h6. [[Hardware Abstraction Layer]] h6(. » [[RISC OS entry points from HAL]] h6((. » RISCOS_MapInIO64 h2. RISCOS_MapInIO64 h5. (OS entry #7) <pre> void *RISCOS_MapInIO64(unsigned int flags, uint64_t phys, unsigned int size) </pre> |_<. Entry | | |/4^. flags |Bits 0-19: B, C, TEX, AP and (for VMSAv6) APX flags for L1 page table section map entry | |Bit 20: Doubly map region | |Bit 21: AP flags specified (otherwise, default to SVC RW access, User none) | |Other bits reserved | |phys |Physical address to map in | |size |Number of bytes of memory to map in | |_<. Exit | | |/2^. - |Virtual address corresponding to phys | |0 for failure | h4. Use As for [[RISCOS_MapInIO]], but accepting a 64-bit physical address argument. h4. See also * [[RISCOS_MapInIO]] h6. Information sources: Kernel.Docs.HAL.HAL_API, Kernel.hdr.OSEntries in CVS