h6. [[Hardware Abstraction Layer]] h6(. » [[List of HAL APIs]] h6((. » [[HAL IIC API]] h6(((. » iic_transfer structure <pre> "C" style construct typedef struct iic_transfer { unsigned addr:8; unsigned :21; unsigned riscos_retry:1; unsigned checksumonly:1; unsigned nostart:1; union { unsigned checksum; void *data; } d; unsigned len; } iic_transfer; Assembler method R0 points to the data block which is a list of transfers set out as:- Word 0 bit 0 = Write/Read bit 1-7 = Address of device bit 8-28 = Reserved bit 29 = Retry flag bit 30 = Return checksum only flag bit 31 = Send no start flag Word 1 = Pointer to memory for data to be sent/received OR checksum value if bit 30 of word 0 set Word 2 = Length of data to send/receive This is repeated for the number of transfers required (R1) </pre> h4. Use This structure is used to describe a transfer as performed by the high-level [[HAL IIC API]]. It is also used by [[RISCOS_IICOpV]] and the [[OS_IICOp]] SWI. * A full IIC transfer (from START bit to STOP bit) is described by one or more iic_transfer structures, arranged in a list * Each subtransfer is described by a single iic_transfer * The direction of the subtransfer is determined by the least significant bit of _addr_, as per the IIC spec (1=Read, 0=Write). * If _nostart_ is 0, a START is first transmitted followed by _addr_. _nostart_ must be 0 for the first subtransfer. * If _nostart_ is 1, the transfer must be a continuation of the previous block, without any start, stop or address bits being sent, and without a change in the read/write bit. * For writes, _len_ bytes of data are read from _data_ and transmitted across the bus. * For reads, _len_ bytes of data are read from the bus and: ** Written to _data_ if _checksumonly_ = 0 ** Summed to _checksum_ if _checksumonly_ = 1, to produce a 32bit checksum * The _riscos_retry_ bit is of no concern to HAL IIC drivers. Retries are the sole responsibility of RISC OS; if _riscos_retry_ is set for the first transfer of a list sent via [[RISCOS_IICOpV]]/[[OS_IICOp]], then RISC OS will retry the transfer list if it fails due to bus-busy or no-ack errors. * Other bits are reserved and should be zero. * A stop bit must be sent after the last iic_transfer block has been transferred. Unless restricted by the IIC controller hardware design, stop bits must not be sent during the middle of the iic_transfer list. h4. See also * [[HAL_IICTransfer]] * [[RISCOS_IICOpV]] * [[OS_IICOp]] h6. Information source: Kernel.Docs.HAL.MoreEnts in CVS