More tiny intros for Risc OS
Kuemmel (439) 384 posts |
Meanwhile on Outline Online Demo Party (NL) Exoticorn/Icebird released two more super nice tiny intros for Risc OS: - edgedancer : 112 Byte raycasting intro using Thumb mode (I guess the first ever intro doing that, thanks to some OS insights from Jeffrey) - elsecaller : 256 Byte tunnel intro As described in the readme, before edgedancer can run you need to rmkill the SpecialFX module, as that got a bug regarding Thumb mode. By now there’s no fix for that. So all in all it seems some kind of demo coding is coming back to RiscOS and we are getting some attention on pouet (basically THE demo scene headquarter website/archive) :-) |
Rick Murray (539) 13806 posts |
Wait, WHAT? How the hell does that tiny amount of code do that?!?
Might well be the first anything that runs under RISC OS in Thumb mode.
Yeah, I’m pretty astonished that the OS is happy with SWIs being called from Thumb. By design or just a happy accident? |
Kuemmel (439) 384 posts |
May be Jeffrey can elaborate more on the Thumb thing. He send us some example code that IIRC was about more than 15 years old…:-) About the SWI’s I think one needs to stick to the SWI numbers 0×00...0xff. You can see that in the source. We don’t really need a lot…I don’t know if higher SWI numbers would work at all. At least since Thumb 2 you can mix in also ‘normal’ instructions. Just I guess Thumb isn’t of much use in general for us as it’s also kind of slow and space doesn’t matter anymore…but for tiny intros it’s a pleasure :-) |
Jeffrey Lee (213) 6048 posts |
By design, although I was also surprised that it seemed to be working correctly. The kernel changes date from the year 2000, so in theory it should work on all versions of RISC OS 5 (with a suitable CPU)
The original ARM code was over 15 years old, the Thumb conversion was brand new.
Correct. For anything else you need to use OS_CallASWI / OS_CallASWIR12. |
Dennis Ranke (8444) 7 posts |
Basically by throwing a ridiculous number of CPU cycles at each pixel. (For each pixel, march forward step by tiny step until a wall is hit.) The basic idea has been done for DOS in 64 bytes and less. In fact, the 112 byte version isn’t really optimized, I didn’t have time to dig into it before the deadline. I already managed to shave of 12 bytes (plus another 6 by not disabling the blinking cursor and not exiting on ESC, which is acceptable in this size category). I’ll try to release an updated version by this weekend. Oh, and I wrote it in the readme, but I also wanted to say it here: Huge thanks to Jeffrey and everyone else who worked on RISC OS in the last years. It was so much fun to come back and do a little coding on RISC OS after nearly 20 years. When the Phoebe died, I never would have thought RISC OS would survive this long. |
Rick Murray (539) 13806 posts |
I never thought I’d experience RISC OS on a gigahertz machine with a gigabyte of memory. Those amounts seem almost silly for a system that offered a usable home DTP solution on a 1 _mega_byte machine with floppy disc. Today? Today it lives and breathes on a diverse range of systems from the cheap and cheerful to the higher end, and with “industry standard” things like USB harddiscs. I’m a little stuck. When exactly was RISC OS’ golden years? Back in the early ‘90s when we had three magazines and big expos in London… |
Kuemmel (439) 384 posts |
@Jeffrey: Do you see any problems mixing Thumb code with NEON code (short time google-ing it, there doesn’t seem a problem in general) ? The only thing to do is to do the VFP init via that OS_CallASWI. That of course would cost some bytes, but all the other ARM instructions and SWI calls would benefit from the 16 Bit Thumb instructions as far as they can be used. I should give it a try if I find some time on my 3d ball intro…so some something like a Thumb frame work for SWI’s and coordinate loop and rest with NEON… |
Dennis Ranke (8444) 7 posts |
@Kuemmel: Thumb-2 supports NEON instructions (all 32bit, of course, so no savings on the actual NEON code, just the surrounding scalar code). So yes, that should work. |
Jeffrey Lee (213) 6048 posts |
VFPSupport does need a couple of updates to allow it to cope with Thumb mode properly (for emulating VFP “short vector” mode on Cortex-A7, A9, A15) – I’ll put that on my todo list. |
Rick Murray (539) 13806 posts |
I get that some ARM processors have a 16 bit memory bus (because it’s cheaper, and a lot of flash devices etc are 16 bit), and that Thumb was devised to squish the ARM instructions into a 16 bit format so you could get executable code with only one memory fetch. I think branches are a special case, but that’s the basic idea. Smaller embedded devices where a full 32 bits of data (plus all the addressing) would be too expensive. What I don’t get is why this ever got added to RISC OS. If the machine can run the OS, it’s already way overspecified for running Thumb programs. Was it done “because we can”? It’s as good a reason as any. :-)
Whoo, such faith…
Yes, the kernel SWIs. I wouldn’t expect to be able to call the Wimp, or anything CMHG creates, in Thumb mode and have it work. Just out of interest, could ObjAsm build that code? |
Kuemmel (439) 384 posts |
I can report that my older 3dball intro runs successfully in a combo of Thumb & NEON code on my RPI4 :-) Seems at least there VFPSupport runs fine without any change. |
Kuemmel (439) 384 posts |
I can report that my older 3dball intro runs successfully in a combo of Thumb & NEON code on my RPI4 :-) Seems at least there VFPSupport runs fine without any change. |
Matthew Hambley (3084) 17 posts |
I’m a little late to this thread but I just wanted to say how nice it is to see a flicker of light in the RiscOS demo scene. I always enjoyed seeing the incredible work of demo coders in the 90s. Now all we need is another coder to come along so you can call each other out in your scroll texts. :-) |
Dennis Ranke (8444) 7 posts |
I have now released the final version of Edgedancer. |