Copro copro-cabana at ROUGOL, Mon 17th Feb 2025

The next meeting of the RISC OS User Group Of London is:

Copro, copro-cabana, presented by Rob Sprowson

Monday 17th February 2025, 7.45pm

The Duke of Sussex
(upstairs in the Chichester or Petworth Room from 6.30pm)
23 Baylis Road, London, SE1 7AY
http://www.rougol.jellybaby.net/venue.html

Also online via Zoom from 7.30pm

https://rougol.jellybaby.net/meetings/

This month we will be joined at the Copacabana Duke of Sussex by Lola Rob Sprowson who will be taking us right back to our roots with a demonstration of his ARM copro for the Beeb. While the original seeds of RISC OS were developed on an ARM1 copro, Sprow will be talking about how he designed his ARM7TDMI copro.

We will have a BBC Master in the pub linked up to the big screen to show the ARM copro in use. In addition to that Rob will also have a collection of other copros for everyone to have a look and play with, including 6502, Z80, Turbo, and 80186.

Although the meeting will also be on Zoom, the hands on nature of this demo (with the wonderful tactile clack of a Beeb keyboard!) means you will get a lot more out of it by attending in the pub. Plus plentiful food and drink on hand :-)

Rumours that Rob will have yellow feathers in his hair and a dress cut down to there have not been confirmed…

Our venue is right next to Waterloo Station and there is parking directly outside. Directions here – https://rougol.jellybaby.net/venue.html

For any queries or to receive the Zoom link (same as previous months) contact us – https://rougol.jellybaby.net/contacts/

Bryan.

Reminder, this is tonight :-)

And there’s a pint, or pineapple cocktail, on offer for anyone at The Duke of Sussex who can figure out what the weird mod board that’s in my Z80 coprocessor does

I’m obviously not coming to the pub, because it’s a very long way, so I’m going to stake my claim to a virtual pineapple cocktail here… is it a state of the art NPU to allow it to embrace open source AI technology?

I’m just going to guess… that’s the Tube chip and… you have custom firmware and a circuit mod to support DMA?

Virtual pint for me if I guessed right (which most likely I haven’t!).

If my bad eyesight is not lying to me:

I think I can see a ROM? So maybe z80 firmware update to fix issues or add features?

I also think you wired pin 6 on the z80 (the WAIT signal) to your extra board, so the board is certainly either adding memory or adding some bankswitching arbitration between the micro and the z80 effectively allowing much better communication, as Rick suggested DMA support?

state of the art NPU?
custom firmware and a circuit mod to support DMA?
I think I can see a ROM? I also think you wired pin 6 on the z80 (the WAIT signal) to your extra board?

Although the writing on the gold chip bottom right does look a bit like “AI”, that one’s the Tube ULA rather than an NPU.
The firmware is, as far as I know, original – the ROM next to the Z80 has never been out of its socket.

We didn’t come up with a definitive answer at the pub, whatever those 3 chips are doing on the Acorn mod board are clearly magic, possibly to do with the WAIT signal, maybe to slow things down for the RAM chips? I’m afraid I don’t know the answer!

I’m afraid I don’t know the answer!

Oh, okay. I thought you knew and this was a test. ;)

To dig any deeper, we’d need closeups of the places where the wires connect to the main board, and of the little board itself. Are they logic gates? If so, what? And so on. That way, it could maybe be matched up with the schematic to try to work out what’s being fiddled with.

Well there are resources online, but those relate to issue 2 boards, so I’m thinking the above is a prototype/issue 1

https://chrisacorns.computinghistory.org.uk/8bit_Upgrades/Acorn_Z802ndprocHL.html

https://www.4corn.co.uk/archive/diagrams/109,000-C%20Circuit%20Diagram%20for%20the%20Z80%202nd%20Processor.jpg

My first guess is that the chips on the daughter board include a 74LS74 or two that do a clock divide of some sort. Which was what I was guessing before seeing the circuit diagram online.

Looking at the two boards side by side and noting that it appears as if one of the wires hooks into the Z80 WAIT signal, I suspect this part of the service manual (for issue 2 boards) is what’s going on here.

To prevent ambiguous events, i.e. a register status change during a status read, this circuit produces a “WAIT” signal to the Z80 processor when the PCS and HCS signals occur simultaneously. When this happens, a low signal from IC29B pin 6 appears at IC30A pin 2. Q on IC30A goes high and, via IC29A, maintains a logic 1 signal upon pin 12 of IC30B, thus, by the end of one clock cycle a high is sent from pin 9 of IC30B to disable PCS. Simultaneously, a WAIT signal is generated for the second processor via IC19AB. As soon as HCS (TP6) is removed, the next rising clock edge removes the WAIT signal from the Z80 and, as PCS is still low, a low signal is sent through IC30B to the Tube. This is then maintained by the low signal upon pin 4 of IC30A until the PCS is complete. Thus, if PCS (TP5) is already running, it will continue despite an HCS, but if HCS began first then PCS is prevented from acting.

It may be that because of the very different timing arrangements of the Z80, both it and the host tried to bang the Tube ULA at the same time, so some extra logic was required to tell the Z80 to back off.
This is an addition on your copro and fitted as standard on an issue 2 board.

That’s my revised guess.

That’s my revised guess

Great sleuthing Rick. My Z80 is marked issue ‘E’, and if I trace a few of the wires (ULA pin 18 and 21, Z80 pin 24) they go to the side modification board which has a 74LS32 and 74LS74 and 74LS132 on it. Comparing those three pins on the issue 2 schematic Steve linked to, they go to chips of the same ’32 ’74 ’132 types.

Great sleuthing Rick.

😺

😺

NetSurf on ARMX6 shows a block like the on below with the Unicode value:

U+1F63A – SMILING CAT FACE WITH OPEN MOUTH

Is there a font for RISC OS with emoticons?

There must be as it’s visible on !Iris I think its FreeSans that !Iris is using

Why does that 🐈 have fangs? Is it secretly some sort of 🧛🦇 pretender?

;)

Why does that 🐈 have fangs?

Furry management always have the extended canines (felines??) – it’s the incisors that don’t really belong.

There must be as it’s visible on !Iris I think its FreeSans that !Iris is using

I might be wrong, but doesn’t Netsurf use the RISC OS font manger (ie. !Fonts)? Iris will be using FreeType (ie. unix fonts). I’m not aware of Acorn’s font manager supporting colour glyphs, but it might well support black and white emojis if someone’s converted a suitable font (eg. Noto Emoji).

I’d guess Iris is using “Noto Color Emoji” as it’s the most commonly used emoji font on Linux: https://en.wikipedia.org/wiki/Noto_fonts

Browsers have an internal list of fallback fonts which are used per-character if the first choice doesn’t have the font available. They will go through a potentially long list looking for a font that includes the glyph it’s after (you can do the same with the CSS font-family property – it tries each font you list, in turn, per character – it isn’t simply a list of fonts to select the first available from). They have cunning algorithms to try to group a run of glyphs from the same font, so you don’t have one glyph looking out of place – it chooses the font with the most number of adjacent glyphs).

Why does that 🐈 have fangs? Is it secretly some sort of 🧛🦇 pretender?

Reminds me of the Cat from Red Dwarf: