CVS

I’ve just put a recompiled version of John Tytgat’s CVS port (0.26) on my website. It works fine now on my ArmX6.

The zip file, CVS 1-12-9, contains all the sources needed to compile it with DDE27. There may still be problems on a pi3 but I’ll leave that to someone who has one.

Great work! Thank you. The lack of an ARMX6 version was stopping me using that machine for some development work.

I’ve just put a recompiled version of John Tytgat’s CVS port (0.26) on my website.

Nice one, thanks. The build above runs on the Titanium without having to turn off Alignments Exceptions.

There may still be problems on a pi3 but I’ll leave that to someone who has one.

SWPs still afflict the RPi3. !PatchSWP doesn’t.

In file CVS.Sources.Original_Sources.!unixlib.source.clib.unixlib.h.buildoptions :-

# define __UNIXLIB_SWP_SUPPORTED    1    /* Set to 1 if the SWP instruction is supported (not on ARM2). */

What more could one ask, just set that to 0, what could possibly go wrong.

This :-

E Bad symbol and E Unexpected operator at line 1071 in CVS.Sources.!unixlib.source.sys.s._syslib :-

   swp_arm2 a2, a2, a3

Edit In the unbuilt source this file is CVS.Sources.unixlib_changes.source.sys.s._syslib

The macro in CVS.Sources.Original_Sources.!unixlib.source.clib.unixlib.s.asm_dec is :-

    ; Macro to implement SWP instruction
    ; srcreg and dstreg can be the same register, provided scratch is a
    ; different register.
    ; If srcreg and dstreg are different registers then scratch can be
    ; the same as dstreg
    MACRO
    swp_arm2    $dstreg, $srcreg, $addr, $scratch
    [ __UNIXLIB_SWP_SUPPORTED > 0
    SWP    $dstreg, $srcreg, [$addr]
    |
    STMFD    sp!, {lr}    ; Could be called in USR or SVC mode
    SWI    XOS_IntOff
    LDR    $scratch, [$addr]
    STR    $srcreg, [$addr]
    [ $dstreg <> $scratch
    MOV    $dstreg, $scratch
    ]
    SWI    XOS_IntOn
    LDMFD    sp!, {lr}
    ]

    MEND

swp_arm2 a2, a2, a3

Try changing that to:

swp_arm2 a2, a2, a3, lr

You can probably do the same for any other places which only specify three registers to swp_arm2.

The flag is already set to 0

The sources compile by copying the original sources then copying the patch files from cvs_changes and unixlib_changes over the copied sources then comping the amended sources.

Ah I see whats happened now – one unixlib change too many.

swp_arm2 a2, a2, a3

Good spot, many thanks. There is just the one occurrence. A SWPless build does now run on the RPi3.

The flag is already set to 0

Not here it isn’t. Due to a missing textile angle bracket in my original post the file name was missing, now corrected.

The sources compile by copying the original sources then copying the patch files from cvs_changes and unixlib_changes over the copied sources then comping the amended sources.

I have amended my post to reflect that and show where the file originates and not simply where it is at build time.

I went through numerous versions of !unixlib before cobbling together something which would compile and not have problems. I had buildoptions in clib.h where it was in an earlier version of unixlib.

Anyway if that fixes things I’ll put the modified version on my website.

I went through numerous versions of !unixlib before cobbling together something which would compile and not have problems. I had buildoptions in clib.h where it was in an earlier version of unixlib.

Ah, I see now. I can imagine it has been a bit of a pain.

Anyway if that fixes things I’ll put the modified version on my website.

Looks good here. There are definitely no SWPs.

Could you confirm that CVS1-12-9 has the fix and is working ok as I can’t test it here. Thanks.

Could you confirm that CVS1-12-9 has the fix and is working ok as I can’t test it here.

Yes, that’s fine on the RPi3.

Should that macro not be using LDREX/STREX to avoid future issues on multicore?