CMP without S flag generates an error
Jon Abbott (1421) 2651 posts |
Whilst comparing the differences in physical processor behaviour for a comparison without the S flag (CMP, CMN, TST, TEQ), I discovered RPCEmu reports an opcode error instead of processing the instruction correctly. For reference, the behaviour should be: ARM610/710 – becomes a NOP Repro code:
If a missing S bit changes the instruction to a NOP, the result is -ve. |
Jeffrey Lee (213) 6048 posts |
Aren’t you missing an OS_SynchroniseCodeAreas call once you’ve poked the instruction? That could be throwing off your results for both native and emulated StrongARM. And isn’t this an issue for the RPCEmu mailing list? |
Colin Ferris (399) 1818 posts |
If you trying out bits of code – why not use !Zap. Go to code mode – enter in ’cmp r0,#0 etc – then save. If you are using a 26bit OS use !ArmDebug to step through it. If a 26 or 32bit OS – !DeskDebug works well. |
Jon Abbott (1421) 2651 posts |
Good point, yes. I keep forgetting about that pesky SA cache! Unfortunately I don’t have access to an SA for a while to retest.
I usually post issues on here, if it’s not the right place I can only apologise. That may explain why the issues I’ve raised with permission faults last year haven’t been resolved yet.
I do use !ArmDebug, however I’m not convinced it does actually execute the instruction, I suspect it emulates it in some way as some instructions don’t execute correctly – does anyone have the source code or know how to contact the author? I’d love to amend it so it works on a 32bit OS and works under ADFFS. |
Colin Ferris (399) 1818 posts |
http://members.upc.nl/t.boogaert6/ !ARM_Debug 1.35 (June 2002) email down at the bottom of the page You might not have the last version – I suggest you ask. |