ArcEm with RISC OS 3.00

!ArcEm is running OK on the RPi3 with OS3.11. (It also runs on the Titanium in 16 colours.) That’s all good.

I couldn’t get OS 3.00 to start, it stalled at a red screen. Is there anything I need to do to get it to go?

I did have an A3000 which was upgraded to ARM3 and OS3.00, a trip down memory lane beckons.

I did have an A3000 which was upgraded to ARM3 and OS3.00, a trip down memory lane beckons.

RISC OS 3.00 was A5000 only and did not work in an A3000.

If the emulator goes to fast, you could have some problems.
IMHO, ArchiEmu manages this better than Arcem.
And it’s much more modern and fast too :)
http://www.tellima.nl/riscos/

RISC OS 3.00 was A5000 only and did not work in an A3000.

I have found the upgrade instructions and contrary to my memory the A3000 was upgraded to OS3.10.

does ArchiEmu run on the Raspberry Pi 3B

Very briefly tested, yes it does.

IIRC there might be issues with the CMOS – being different on 2 and Arthur…

That and the memory sizes?

Bear in mind that RPCEmu presumably won’t run anything earlier than 3.5, since that was the first version for Risc PC.

If Arcem does not run Riscos 3.00 and lower, iirc it has to do with ‘external rom/ 5th-column rom’, which is not understood <3.10. Prior to 3.10, memorymap &3400000-&37FFFFF is seen as a mirrorpage of the ROM, but >=310 there can be a filing system full of short ROMS there; Arcem comes with a couple of modules to load into this area like ArcemModes, hostfs, scrollwheel (directory extnrom). From Riscos 2.01 16Mb of RAM is supported, 2.00 and below stop at 4 Mb. It should not be too hard to disable 5th column roms and change the maximum allowed ROM/RAM sizes, to run Riscos <3.10?

Not sure if I’ve ever tried 3.00, but if it is true about it being A5000 only then chances are it’s a limitation of ArcEm’s hardware emulation that stops it from working (e.g. ArcEm only provides ST506 hard disc emulation, there’s no IDE support). 3.10 should be fine.

Arthur and RISC OS 2 definitely work with ArcEm; I did a quick test with RISC OS 2 last night. However as people have mentioned you need to be careful with CMOS and the amount of memory. It should be possible to do a CMOS reset by holding down R when starting the emulator. The extension ROMs shouldn’t be an issue (they’ll be present in the memory map but the OS will ignore them).

It’s just an initial guesss. After I added support for extension roms in my emulator, the roms <3.10 stopped working; and worked again when they were allowed to be mirrored in the pages that extension roms occupy. But I have a version of Arcem that supplies singlestep registercontents, will try it the coming days.

Arcem/RO300 has been traced now, to find the location where it derails.
Riscos 3.00 (like 3.11) does a lot of testing, e.g. the integrity of the ROM, the timings of the IOC timers, the speed of the MUL instruction etc.
At instruction 4427790 it has checked the RAM, by reading back a previously stored bitpattern. At instruction 4498089 it wants to do ‘&3802460:LDR R0,[R0,#32]’. R0 has value 0. It seems that page 0, where address 32 is, is not mapped-in, so a data-abort follows: it tries to jump to &10 but as page 0 still does not seem to be mapped-in a prefetch abort (address &C) follows, and as &c also is not mapped in a prefetch abort follows… etc.
I don’t know Arcem enough to estimate how difficult it is to fix (very if it’s the logical<—>physical memory translation), but RO3.11 is better than 3.00 so I don’t think it’s worth the effort in the first place. If the programs of the OP work under 3.11, that is.

but RO3.11 is better than 3.00 so I don’t think it’s worth the effort in the first place

I agree. I do not specifically need 3.00, in practice 3.11 is a better idea. Thanks.