what wrong with 26 bit?
entityfree (3332) 77 posts |
without completely researching the subject i want express opinion that 26 bit computing could be cool still. one reason being that i like multimedia and it could have benefits because of video being 24 bit. and if not then maybe something like 48 bit or loosely(eg 36-52) approximate might be interesting. or for use with audio. |
David Feugey (2125) 2709 posts |
ARM was always a 32bit processor. |
Rick Murray (539) 13850 posts |
26 bit computing is a lost cause when it comes to things such as video and, well, anything liable to use a lot of memory. As David says, the ARM has always been 32 bit. The 26 bit refers to the amount of space within the program counter for providing the address of the instruction currently being fetched. The other bits? Processor status. Because of combining the PC and PSR into the same register, it means that you have a lot less ability to address different memory locations. As such, a 26 bit ARM can only address a maximum of 64 megabytes 1. In total. That’s software, the OS, memory-mapped hardware, everything. Plus, I’m not aware that anybody is actually developing anything specifically for 26 bit devices. Certainly, the OS branch is now a dead end… 1 The RiscPC could contain more than 64MiB RAM when running in 26 bit mode, as the processor in the RiscPC is capable of running in 32 bit mode; so it does some fudging of the memory mapping to make it all work, however at any given time the processor (in 26 bit mode) can only ‘see’ 64MiB, so there are limitations, such as the maximum possible application slot is something like 28MiB. |
David J. Ruck (33) 1636 posts |
But combining the PSR in to the PC, allowed you to do some really nice things, 32bit code being very clunky by comparision. Not only could you preserve the current execution state in one cycle, but there were lots of useful tricks being able to manipulate the PSR in the current PC, or LR before returning from a subroutine. |
Timothy Baldwin (184) 242 posts |
On the RiscPC RISC OS runs in a 32 bit program and data space configuration, in which 4GiB of data address space is available regardless of processor mode, and exceptions entered in 32-bit modes, which RISC OS 3/4 would promptly change into 26 bit mode. In 26-bit modes instructions are limited to 64MiB. ARM6 and ARM7 also had options of 26 bit program space and 32 bit data space, and 26 bit program and data space, in which the processor is stuck in 26-bit modes. |