Adding ROL OS_ReadSysInfo 6 items

RISC OS 5 OS_ReadSysInfo 6 does not provide a means to discover the address of the SWI return code which I need for a test case which wraps OS_Heap.

It would make sense to replicate RISC OS Limited’s interface, and add the other non-clashing items:

--- a/castle/RiscOS/Sources/Kernel/s/Middle
+++ b/castle/RiscOS/Sources/Kernel/s/Middle
@@ -1564,16 +1564,18 @@ osri6_table
     ; 21 = Timer 0 latch value
     ; 22 = FastTickerV counts per second
     ; 23 = Vector claimants table
-    ; 24 = Number of vectors supported
-    ; 25 = IRQSTK
-    ; 26 = JTABLE-SWIRelocation
-    ; 27 = Address of branch back to OS after SWIs
     DCD  JTABLE-SWIRelocation                         ;18 - relocated base of OS SWI despatch table
     DCD  DefaultIRQ1V+(Devices-DefaultIRQ1Vcode)      ;19 - relocated base of IRQ device head nodes
     DCD  DefaultIRQ1V+(Devices-DefaultIRQ1Vcode)      ;20 - relocated end of IRQ device head nodes. NOTE: Gets fixed up when read
     DCD  IRQSTK                                       ;21 - top of the IRQ stack
     DCD  SoundWorkSpace                               ;22 - workspace (8K) and buffers (2*4K)
     DCD  ZeroPage+IRQsema                             ;23 - the address of the IRQ semaphore
+
+    ; ROL compatable:
+    DCD  NVECTORS                                     ;24 - Number of vectors supported
+    DCD  IRQSTK                                       ;25 - top of the IRQ stack
+    DCD  JTABLE-SWIRelocation                         ;26 - relocated base of OS SWI despatch table
+    DCD  SLVK                                         ;27 - Address of branch back to OS after SWIs
     %    (256-(.-osri6_table))
     ; Use 64+ for a repeat of the danger zone, and our new allocations
     DCD  JTABLE-SWIRelocation                         ;64 - relocated base of OS SWI despatch table

Does anyone see any problems?