Econet module

I’ve been making some changes to the Econet module, mainly to get it working with my DIY Econet podule so I can run a Level 4 econet fileserver on a RISC PC to use with my vintage Acorn collection. See this thread on Stardot for further details of the podule:
http://www.stardot.org.uk/forums/viewtopic.php?f=16&t=8155

After getting it working in 26 bit mode on RISC OS 3.7 & 4.02 I decided to convert it to 32 bit and I now have it working under RISC OS 5 on a RISC PC. The modified code should also work on a standard Acorn Econet NIC but I don’t have one so can’t test it although the podule option is probably the only practical choice if you want to use an ethernet NIC as well.

I think the module could be made to work on the Iyonix but it may require some further changes as it accesses some IOC/IOMD registers in addition to the ADLC registers: IOCFIQMSK, IOCFIQSTA, IOCIRQREQA & IOCIRQMSKA

The FIQ handler uses the force bit in the IRQ register to generate an IRQ to downgrade the priority of some routines.
It also accesses the IOC’s Timer0 to provide a 40uS delay.

I’m not familiar with the Iyonix hardware so does anyone have any suggestions for the best approach for abstracting these registers through the HAL?.

After getting it working in 26 bit mode on RISC OS 3.7 & 4.02 I decided to convert it to 32 bit and I now have it working under RISC OS 5 on a RISC PC. The modified code should also work on a standard Acorn Econet NIC but I don’t have one so can’t test it although the podule option is probably the only practical choice if you want to use an ethernet NIC as well.

Interesting stuff. I’ve been (slowly) picking over the Econet stuff too, as I suspect some bits of it haven’t been tested in anger for some time.

My test setup is mainly limited by the spare space on my desk, but perhaps you have a more complex network with more varied stations? I have a bridge somewhere too though reading the manual suggests I’d need two clock boxes to make that work so I’m postponing that test, but it’s that sort of thing that’s likely to have fallen into disrepair.

Perhaps you could drop me an email so we can coordinate to not to duplicate effort.

The source for the Econet module in the CVS seems to be very close to the version shipped with RISC OS 3.70 although it produces a different binary as some of the macros it uses have been converted to 32 bit. I have found what appears to be a long standing bug which results in heap corruption and crashes although this may not be apparent to anyone using a version running or loaded from ROM (i.e. anyone with an official NIC):

The module reserves &5D4 bytes of workspace and together with the size word at the start that requires &5D8 bytes but the workspace is allocated in quadword chunks so &5E0 bytes are actually reserved. If the remaining 8 padding bytes following the workspace contain garbage instead of zeros, the module will corrupt the heap. When the module is loaded or run from ROM, it gets allocated unused memory at startup which is already zeroed. When the module is soft loaded during the boot sequence, it can get allocated previously used memory which is full of garbage, so the 8 padding bytes can be non-zero and that results in corruption.

Looking at the source, memory for a partial tx/rx control block is reserved at the end of the workspace for use with remote peek and poke and a brief review of the relevant code seems to indicate that is enough, but I assume some path must lead to code that makes use of the full size control block. I haven’t located the actual cause yet, but as a workaround I extended the control block to the worst case size and zeroed it out on startup. I haven’t had any corruption or crashing issues since then.

The other problem I found was an additional incompatibility with the StrongArm. When the FIQ routines exited, they were frequently retriggered by the same interrupt because they were executing so fast that the original interrupt hadn’t had time to clear down. To fix this I added a dummy read of an ADLC status register (500nS delay) before exiting the FIQ. This wasn’t apparent on the NIC as that had an asynchronous Intel style interface which required a longer period to read and write to the ADLC and that provided enough of a delay compared the the 2Mhz synchronous interface of the podule.

I do have quite a complex Econet setup:
2x RISC PC & 1 x A7000+ with DIY econet podule all running level 4 fileserver
1x A5000 running level 4 fileserver
1x A440 & 1x A440/1
2x Master 128
All these are on a 200Khz clock

I then have a Bridge to connect to a second segment running at 100Khz which has the following

1x Electron with DIY Econet interface
1x Atom
1x System 5 Level II fileserver

I also have a couple of BBC micros, a Reuters board and an PC Ecolink card but they are not plugged in at the moment.

I know this is an old thread but how did you build the econet source…
EDIT :
I found it :
Edit BuildSys.Components.ROOL.BCM2835
And add a line Econet on the correct place

Create in
Sources.Networking.Econet.o
A dorectory called RPi
Do the same in
Sources.Networking.Econet.rm