Red Squirrel Support
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Jon Abbott (1421) 2651 posts |
Is it possible to change the emulation detection code so RO5 works on Red Squirrel? Suggested code change:
And while we’re about it, rename the “RPCEmu” forum to “Emulators” or something more suitable? |
Jeffrey Lee (213) 6048 posts |
Do you know what IOMD_VERSION is reported by real hardware? (A7000, A7000+, RiscPC) The ARM7500/7500FE datasheets don’t indicate what version number is returned there, and I daren’t touch my RiscPC at the moment in case I disrupt the beagleboard which is busy trying to track down the TickerV corruption. |
Jon Abbott (1421) 2651 posts |
A7000+: 1 |
Jeffrey Lee (213) 6048 posts |
Yep, that looks about right. It looks like RPCEmu used to return correct values (3 for RiscPC & A7000, 1 for A7000+) but was then changed to return zero so that RISC OS 5 could detect it. So I can’t imagine there being any problems with us skipping the test for a version of &9c. |
Colin Ferris (399) 1814 posts |
Looks like &9c applies to VRPC as well. If the model is set to [VRAM = 0] the older versions of RO5.19 (19Jun2012) makes full use video ram (upto 32Mb). |
Jeffrey Lee (213) 6048 posts |
That was probably when the VIDC bandwidth limit handling was moved into the video driver instead of being handled by the *command. If we can safely detect emulators by looking at IOMD_VERSION, I guess there’s no real reason why we can’t remove the bandwidth limit for them. |
Jon Abbott (1421) 2651 posts |
Excellent news, I’ll test on the emulators I have once it’s submitted. |
Sprow (202) 1158 posts |
No, that would be truly terrible. The VIDC20 driver gets the amount of VRAM using a legal OS SWI and adapts the allowed modes appropriately (modulo the maximum VRAM/clock that a real VIDC20 would permit). This in turn is autodetected by probing the memory space that would have VRAM in it on a real Risc PC – not some backdoor check of an unimplemented emulator register.
No, you’ve not spotted the problem at all – the problem is that the emulator isn’t emulating the timing of VIDC (with respect to IOMD) correctly. That’s an emulator fault, not a cause to jump round things in RISC OS.
That’s because VRPC is the commercial development of the RedSquirrel source, isn’t it?
Other way round, it used to be incorrectly reporting 0, and we used that as temporary skip (I added) for RPCEmu. When RPCEmu then tried to improve their emulation of IOMD (by getting the version register right) the horribleness has now been enshrined in stone requiring them to change it back just so RISC OS 5 will boot. I discussed the options here but it looks like nobbling the version register (again) was easiest. Rather than fritter developer time bodging RISC OS, can Jon/Colin (who seem to be the only 2 people in the world using the 13 year old abandoned RedSquirrel emulator) go and fix the emulators – either to emulate the chipset properly, or improve RPCEmu so it does whatever you’re clinging onto the furry version for.
…and I’ll be poised to revert the change minutes later. |
Rick Murray (539) 13840 posts |
Given what Sprow has said – and given the surely tiny number still using RedSquirrel, wouldn’t it be easier to apply a one word patch to get RedSquirrel to return a recognised ID? |
Jeffrey Lee (213) 6048 posts |
Ah, I’d falsely assumed that since we were making concessions for emulators that it was OK to make concessions for emulators. If that’s not the case, then I’m all for removing the RPCEmu hack and forcing them to fix their emulation. |
Colin Ferris (399) 1814 posts |
Are you surgesting disasmbling the exe files and trying to find out how they work!! |
Jon Abbott (1421) 2651 posts |
bq No, you’ve not spotted the problem at all – the problem is that the emulator isn’t emulating the timing of VIDC (with respect to IOMD) correctly. That’s an emulator fault, not a cause to jump round things in RISC OS. In that case, the check should be removed from RISCOS completely. I don’t understand why there’s a concession and a specific forum group for RPCEmu when other emulators exist and exhibit exactly the same behaviour. For the sake of a single instruction to bypass the POST I really don’t understand the stance here.
Correct, it’s the same codebase.
It’s hardly frittering developer time by adding one instruction. RPCEmu has major flaws with it’s MMU emulation which I reported to the devs over a year ago, Red Squirrel doesn’t have these problem, so it’s currently the only emulator devs can use for RO5 IOMD where an accurate MMU is required.
How childish. |
Peter Howkins (211) 236 posts |
There may be an alternative here, revert the RO5 POST model to a more traditional style (RO3, RO4) Old model 1) POST fails New model (I beleive similar to the NCOS style) 1) POST fails It may be that the old model is more usful for real Risc PC hardware, regardless of the emulator question. |
Steve Pampling (1551) 8170 posts |
There may be an alternative here, revert the RO5 POST model to a more traditional style (RO3, RO4) Much as I use RPCEmu for such things as experimenting with the DDE and working on old code updates as a learning exercise I would say that IF the code is reverted to that model for convenience of use on emulators then surely any stage 4 "carry on and try and boot regardless should surely have a nice BIG message saying the emulation is incorrect hanging around for 20-30 seconds before carrying on.1 Then the users can pester the emulator authors to provide the right feature so that the message goes away permanently. Now that’s what I call the middle way, make it work but tell people what’s wrong and allow it to work without the warning if the emulator is fixed. 1 I like helpful error messages |
Rick Murray (539) 13840 posts |
Having reviewed this thread: Current code:
The proposed code appears to add a single word to allow the second emulation test to work. I support this modification. I originally thought that the proposal was to skip some of the tests if running on an emulator, but now I can see that RISC OS already does this. Why is it such a hardship to support another emulator? Or, to look at it another way, what makes RPCEmu special? ;-) As to whether or not it should be done – the answer is simple. Somebody should build an IOMD version with the modification in place. Does RISC OS 5 then work on RedSquirrel? If so, there’s your answer.
Just out of interest, what flaws? The MMU works sufficiently that RISC OS runs… or is that the problem, it only implements what RISC OS needs? |
Steve Pampling (1551) 8170 posts |
It actually has active maintainers? |
Jon Abbott (1421) 2651 posts |
My point exactly, there’s already a precedent set for RPCEmu so there’s no reason to exclude other emulators. RPCEmu should not receive special treatment either within RISCOS or on this forum. The “RPCEmu” forum needs to change to something that covers all emulators running RISCOS.
The MMU doesn’t implement memory security. eg. !&F0=0 from BASIC will work under RPCEmu, but should throw an exception, IIRC it doesn’t check L2PT when memory is accessed. |
Peter Howkins (211) 236 posts |
“surely any stage 4 “carry on and try and boot regardless should surely have a nice BIG message saying the emulation is incorrect hanging around for 20-30 seconds before carrying on.” Unfortunately it can’t be an ‘RPCEmu’ specific message, as it is also would be displayed on real hardware that is starting to fail. Making the POST actually display what the errors are to the user on screen may be a useful addition (assuming enough of the earlier tests for Memory etc have passed). In summary, here’s why I suggested changing the general POST behaviour 1) For real RPC users, they get the traditional behaviour rather than an unhelpful stop on all POST failures? (including CMOS checksum failure?) “Or, to look at it another way, what makes RPCEmu special?” Erm, ROOL wanted it to work with RO5, so they could sell the combo? :) (which is why this is a RPCEmu forum, not an ‘emulators’ forum, it’s because ROOL sell a copy of RPCEmu with RO5 and this is the first line of support for that product) “Just out of interest, what flaws? The MMU works sufficiently that RISC OS runs… or is that the problem, it only implements what RISC OS needs?” Permissions issues are not always accurate, sometimes cached when incorrectly when they’re used in a JIT block, it is on the list of things to look at, after tidying up the load/store instructions first. Address Exceptions and vector exceptions aren’t implemented yet. TLB needs a nice rewrite. (this is a bit of a bad summary as it’s normally my brother that looks at this bit). 1] Which I’ve not really investigated that much into why, the ‘fudge the IOMD version back to 0’ hack went into RPCEmu as I ran out of time to look before the next release was due. |
Peter Howkins (211) 236 posts |
“My point exactly, there’s already a precedent set for RPCEmu so there’s no reason to exclude other emulators.” And it’s a terrible precedent, instead of adding another hack for another emulator, remove both and have the regular code carry on, like RO that shipped on thousands of machines. |
Bryan Hogan (339) 592 posts |
Its lovely developers of course :-) |
Rick Murray (539) 13840 posts |
Hmm… I downloaded the current IOMD nightly and patched +&1BCC to be Result? The activity indicator shows that something is happening, but all I see is a blank screen. As far as I’m aware, there is no trace facility in RedSquirrel so I can’t see what is being executed. The console report shows this happening as RISC OS 5 initialises: IOC WriteByte 0x1f4, 0x0 DS set frequency 6/1us, 166666Hz DS set real freq 48us, 20833Hz IOC ReadByte 0x48 IOC ReadByte 0x4c IOC ReadByte 0x58 IOC ReadByte 0x5c IOC ReadByte 0x7c IOC ReadByte 0x88 IOC ReadByte 0x90 IOC ReadByte 0xb0 IOC ReadByte 0xb4 IOC ReadByte 0xb8 IOC ReadByte 0xbc IOC ReadByte 0xc0 IOC ReadByte 0xd8 IOC ReadByte 0xdc IOC ReadByte 0xfc IOC ReadByte 0x100 IOC ReadByte 0x104 ...SNIP 415 LINES OF THIS!... IOC ReadByte 0xf98 IOC ReadByte 0xf9c IOC ReadByte 0xfb8 IOC ReadByte 0xfbc IOC ReadByte 0xfcc IOC ReadByte 0xfe4 IOC ReadByte 0xfec IOC ReadByte 0xffc After that, blank screen. Nothing else happens if left for three minutes. In the interests of fairness, I threw the modified ROM image at RPCEmu v0.8.9. It booted normally. Is there something else I need to do to get RISC OS 5 to work on RedSquirrel? |
Jon Abbott (1421) 2651 posts |
You need to reset your CMOS, see my post on to how to bypass the POST |
Steve Pampling (1551) 8170 posts |
From the info posted previously by Colin that appears to amount to compressing it using an LZW algorithm and tacking a set of bytes onto the start of the resultant file. 1 As I recall. Feel free to shoot if I got the number wrong. |
Jon Abbott (1421) 2651 posts |
This sounds sensible, the fact RO5 hangs on a POST failure seems to me to be a serious flaw in the OS which needs addressing.
I’ve got RO5 running under VirtualRPC-SE without doing this. |
Rick Murray (539) 13840 posts |
Ah, but the problem is that RISC OS will go from working on an emulator to working only on real hardware. I NOPed out the check to see what happens. RPCEmu has been “contemplating” for about five minutes now. ;-) Thank you both for explaining the MMU issues. As for the precedent – I would suggest that at this time it shouldn’t hurt to add RedSquirrel to one of the recognised emulators if (and only if):
Why? Simple. We don’t exactly have a lot of emulators capable of running RISC OS 5. In fact, RedSquirrel (maybe) and RPCEmu are pretty much it. VRPC may be a contender but it seems to obfuscate itself for the sake of it. Why? Choice. If one instruction provides a choice, it seems churlish1 not to. But this is assuming that this one small change is all that is necessary. 1 Churlish, as city folk should know, is on the Circle line between Weston Mannering and Mornington Crescent… |
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