Code variable Alarm$Free produce serious errors

Hello everybody,

Last week I found out that when I start RPCEmu 0.8.9 (also tested with latest RISC OS 5.19 rom download) without harddisc booting (aborted by escape), starting !Alarm in the bare Desktop, reading out the code variabele Alarm$Free produces an Internal error: abort on data transfer at &FAFF33C8. The address is not constant, it depends if I use Show alarm or *Show alarm$free. If I use the command from the Switcher Run command I get the error SWI &697753 not known. When I Boot the system the fault does not occur.

So my question is, can somebody confirm this issue on real RISC OS hardware? I want to know if it’s an Emulator issue or not.

Thanks in advance.

!Alarm 2.86 runs fine on RISC OS 4.02 on a Risc PC.
I tried a disc loaded (as well as ROM based) copy on 5.19, and both blow up with an internal error, regardless of whether !Boot completed or not, with RPCEmu 0.8.8 and 0.8.9.

Doing a *MEMORYI PC -80 +90 showed perfectly good looking instructions (despite getting an undefined instruction error).

Softloading on above mentioned Risc PC also works, so it looks like an emulation issue.

Thanks for testing. But these test still does not completely conclude it’s an emulator issue. Because if I run Alarm 2.86 under RISC OS 4.39 or 4.02 with the same emulator, the problem doesn’t occur. So it would be nice if someone could test this on recent RISC OS 5.19 hardware (Beagleboard, ARMini, Pandaboard etc).

if I run Alarm 2.86 under RISC OS 4.39 or 4.02 with the same emulator, the problem doesn’t occur

Though in that case both are running the core in 26 bit mode.
I tried with a Beagleboard xM (5.19 20-Sep-2012) and Alarm 2.86 works fine there too.