%FT and %BT

Does anyone know of a prog that can remove from a text file the below:

ADR R0,&XXX
ADD RO,R0,&XXX or SUB R0,R0,&XXX

Removing the ADR line should be no problem with StrongED, but the second line is more difficult. How do you distinguish an ADD part of an ADRL from an ordinary ADD?

Your best bet might be to comment out the ADRs in the source and then build that. Output won’t run, of course, but you can now compare the versions without the mismatching ADRs.

Using StrongEd v4.66 over a group of files – how do you search for :

MOV R0,#1

Don’t seem to get the syntax correct – I can search for ‘MOV’ or ‘R0,#1’
but not ‘MOV R0,#1’ together – any advice?

Is that really 4.66? If so, I’d strongly recommend upgrading to 4.69f6 especially if you have ARMv7 hardware as 4.66 is not ARMv7 compatible.

As to the search; you should use: “MOV” * “R0,#1”. This will match all ‘MOV R0,#1’ including ‘MOVeq R0,#1’, etc. To match all unconditional ‘MOV R0,#1’ use: “MOV” {" "}+ “R0,#1”. Make sure that you’re using advanced search.

That manual for extbasicasm is most useful.

Good.

32Bitting looks doable – first 32bitting to work with the RO4 BASIC & then with a RO5 version of BASIC.

That would be great. I can assemble under RO5 using Aemulor, but it is slow, so I use VRPC on a new PC ¹, which is very quick. Unfortunately, some projects use features unique to RO5 on the Pi and I have to revert to plain vanilla BASIC assembler. The most missed instruction is ADRL. A macro is a doddle, but it not the same.

¹ I finally switched off my RPC after nearly 20 years of continuous service last week. ;-(

Running RO5.21 on my RiscPc here :-)

RedSquirrel can run RO 5.19 and soft load RO5.21.

Interesting about the ADRL macro – I wonder if different versions could be made to match older code? How many ways of doing ADRL – are there?

Thanks Fred – now got the StrongEd search working :-)

Came across this bit of code:-

    ADD    R1,R1,#&00,24

any ideas of what it’s doing.

ADD R1,R1,#&00,24

It’s short for:

This may look silly but I guess it’s the second instruction of an ADRL and the offset is such that it fits inside the first ADR instruction. The ADD is not necessary, arithmetic wise, but as ADRL is guaranteed to be two instructions the ADD is still being generated.

Thanks – thats why when re-assembled – it is now :-

    ADR R1,&44D
    ADD R1,R1,#0

ADD R1,R1,#0

The usual form of a NOP is MOV R0,R0. Is there any difference between that and adding zero? I thought they would take the same amount of time to execute, but then I wonder if it wouldn’t stall the pipeline awaiting data in R1 to be valid?

The most missed instruction is ADRL. A macro is a doddle, but it not the same.

Sounds like a dumb question, but with the basic sources available now, how come none of this stuff has been added? IMHO, ADRL should have been added decades ago…

I finally switched off my RPC after nearly 20 years of continuous service last week. ;-(

That sounds terminal. That’s it? Finished?

The machine was still fine, but I realised that as time passed it might be more and more prone to sudden failure. It was time to move on.