Podule Info

Having a go at getting a podule number from its name – I can’t see a swi podule command for it – have I missed it?

Thanks

[edit 1]

Is there any info – about comparing the ‘Acorn’ podule system and PCI Express that is used in the ‘Ti’?

Having a go at getting a podule number from its name

No, you’ll have to enumerate the podules, look up their names and do a collation yourself.

SYS"Podule_ReturnNumber"TOP%
IFP%THEN
 FORN%=0TOP%-1
  SYS"XPodule_ReadInfo",256,&8300,4,N%TO;V%
  IF(V%AND1)=0:SYS&2002B,!&8300TOA$:PRINTN%" "A$
 NEXT
ENDIF

Thanks for that – Hmm SWI Podule_ReturnNumber is only good if the podules are line astern.

with ref to ASM -:
b start
.name
equs name of podule 0
align
.space
equd 0
.start
mov r0,#9 ;eight podules+1
.loop
mov r0,#&100
adr r1,space
mov r2,#4 ;size of space
subs r3,r3,#1
movmi r0,#-1 ;if no pods
bmi exit ; if r3 =-1
swi XPodule_ReadInfo
bvs loop ;if no podule

compare podule name yes/no

bne loop
mov r0,r3 ;no of pod that matches – or -1 for no pods.

.exit
swi OS_Exit

[edit 1] updated.
[edit 2] ro5 updated -no passing flags through swi’s

SWI Podule_ReturnNumber is only good if the podules are line astern.

O_o

The number of podules returned is the number of podule SLOTS, not necessarily the number of podules PRESENT. That’s why in my snippet I’m using the X form of ReadInfo and paying attention to the V flag on exit – only if there is no error does it print the podule name.

subs r0,r0,#1 ;can this be made to jump when r0 =0?
bne loop

Slot 0 is a valid slot, so this is an off by one error. The two worst programming errors are:

1. Off by one errors

Thanks for that info – Slot 0 – was the problem – ref the updated post.

I see here – swi Podule_ReturnNumber TO A% – gives 9 with VRPC-DL – so I can use it.

(Is there any info around – on how the software podules system works)
(ie what in the Windows side?)

Is there any info around – on how the software podules system works [in VRPC]

VRPC models real podules pretty closely – a podule is a chunk of memory-mapped hardware and a ROM containing a number of ‘chunks’ of stuff, including the ‘loader’ (drivers for a number of OSes), modules, sprites, BBC Micro ROMs (yes really), and various identifying text strings.

VRPC also requires a DLL on the windows side which simulates the hardware of the podule – ie deals with reads and writes to its memory area. The RISC OS module (such as HostFS or Resolver) is embedded in the podule’s ROM and copied to the RMA during boot. Thereafter, the module thinks it is reading and writing a bit of hardware, via the podule memory address in R11 during its initialisation. Meanwhile, the emulator calls the associated DLL with every read and write attempt in that memory window.

This is analogous to the way Michael Foot’s BeebIt BBC Micro emulator and my BeebIt64K module work together – the latter is a RISC OS module that simulates some hardware plugged into the 1MHz bus, and BeebIt communicates with it by passing all read/writes of FRED/JIM/SHEILA through the official OS_Byte calls in RISC OS.

It’s exactly the same model – inside the emulation the software thinks it is talking to hardware, outside the emulation the emulator talks to a hardware simulation via a simple API.

Is there any info on the use of Podules – I presume it a follow on from the BBC computer?

Looking at a 26bit example loader file – what is PageReg?
(Librarian ro3 Manual Page 4-131)

In this example it is given as &3000 – where in other later examples it is &2000

What sort of memory map – goes with a Podule?

Have you read this: https://www.chiark.greenend.org.uk/~theom/riscos/podules/index.html

I wrote on that page:

I haven’t got around to putting the text online

Hmm, that was about a decade ago. I ought to fix that…

Done. The text and figures from the articles are now up. I don’t have the original formatting (that was done by Archive) so it’s raw text, Draw and TableMate (that are readable by Draw if you retype them), but at least you should have everything there.

Well done that man.

Thanks for the Info -I supose it will take a little while – for it to be on your web site – have just asked on ‘archive on line’ if the series could be made available.

Otherwise it will require a search through the old Mags :-(.

I’m still trying to get my mind around the concept of ‘Podules’.

From what I have read – you can have a euro board or smaller -with a connector at one end – which is connected to buffers.

You can have a single/double/quad? half a one – backplane fitted – space permitting.

Each of the sockets are copies of each other – bottom one maybe different No 0?

The socket is made up of – (A guess) – 32×2 lines of the socket are input/output – some interups – clocks.

The the RO has control over this lot – how does it know a podule is fitted?

Seems some of the Software modules seem to switch on the Hardware – at startup/Init – does that need to be done only once – for ‘all Podules’.

Does this work the same under emulation – or does every module/Podules have to set/switch on at startup?

(do people have a pile of these boards – each for every project?)

(Be able to piggy back a ‘Veroboard’ prototype card on the back of a standard blank Eurocard/Podule) -

Is Rick’s Win ‘VeroDes’ – prototyping program coming to RO? :-)

do people have a pile of these boards – each for every project?

This kind of thing is very handy

Thanks for the Info -I supose it will take a little while – for it to be on your web site – have just asked on ‘archive on line’ if the series could be made available.

You might have to reload the page, but the zip of text and figures is now the top link. If anyone feels like dropping them into a DTP program and PDF-ising them that would be great – I don’t have such to hand at the moment.

From what I have read – you can have a euro board or smaller -with a connector at one end – which is connected to buffers.
You can have a single/double/quad? half a one – backplane fitted – space permitting.

Yes, that’s mostly just mechanicals.

Each of the sockets are copies of each other – bottom one maybe different No 0?

Yes – except for a few lines on an individual slot basis which tell you your slot has been activated: Podule Select, Module Select and EASI – each one indicates it’s being accessed in a different way.

The backplane decodes these signals, so the backplane sets how many slots you get. Pre-Risc PC the limit was 4, though some machines (eg A3000) had physical constraints.

The the RO has control over this lot – how does it know a podule is fitted?

The podule has a ROM on it to say what it is. The simplest is a one-byte hardwired ‘ROM’ that says it’s a ‘Simple Podule’ with a 4 bit ID.

Seems some of the Software modules seem to switch on the Hardware – at startup/Init – does that need to be done only once – for ‘all Podules’.
Does this work the same under emulation – or does every module/Podules have to set/switch on at startup?

Typically the ROM contains the software for the podule, and often this is loaded at startup. For instance, a new disc interface needs its software loaded so you can boot from a hard drive plugged into it.

Under emulation this load-modules-at-startup routine is exploited by pretending there are podules attached. The OS then goes and loads their modules. This means the emulator can inject code into the running OS (for instance, its own HostFS module) while still letting you run any OS ROM you like.

Yes – except for a few lines on an individual slot basis which tell you your slot has been activated

DMA?

DMA exists on two slots on the Risc PC machines only, so many podules don’t use it. It’s pretty much a clone of ISA-bus DMA and, yes, there are separate DMARQ (request) / DMACK (acknowledge) lines for those two slots.

Risc PC podules also have a much bigger (16MiB) address space than earlier podules (4KiB). To be compatible, many podules implement both. Paging enables access of larger address spaces (especially larger ROMs) through this small 4KiB window.

Considering Podule was intended to be the replacement for the 1MHz Bus (256 + 256 paged) and The Tube (4 + 4 FIFOs) 4KB seemed huge in 1987.

4KB seemed huge in 1987.

Even when you consider three quarters of this may be wasted – byte addresses on the hardware given word addresses to RISC OS.

I may have that slightly wrong – I think it was 4KiB if byte-addressed, 8KiB if 16-bit addressed. 32-bit addressing wasn’t an option on the Archimedes, but 16KiB of address space was reserved for each podule. Then there were 4 different timing modes which were selected with another two address lines (making 64KiB of IOC space per podule) and a handshaking mode (another 16KiB). This all had to fit into the top 16MiB of address space along with ROMs, the MEMC address translations, and all the other peripherals.

Thank you for the info – I can’t believe it was written so long ago- 2003/4 :-(

I just dropped the text into 32bit !TextEase/espeak – very good for reading it out – plus it hi-lights the text as it goes and scrolls the page if needed.

Pity – !PDF can’t read out text.

Can close your eyes – as it goes – to try to get some idea what you are talking about :-)

What format would like it in – OvnPro – the new Imp – seems to be in the 26bit camp still :-( and I have to switch to 26bit OS to get it to work.

Is there room in the ‘Ti’ machines cases for Euroboard sizes?

Any idea’ if a ‘PCI_Express’ to ‘Podule’ adaptor could be made – there seems to be a ‘PCI_Express’ to ‘PCI’ board available?

Perhaps a using a A3000 size ‘Podule’ board – as a new standard.

(By the way Theo – since you have been to Greece – have you had a chance of seeing the original ancient ‘Arc’ – a planet position predictor – I think)

A PCIe to podule adapter would be feasible, however it would need a nontrivial FPGA. The cheapest FPGA board with PCIe I can find is $200, and then you’d need to add another board with voltage conversion on top.

I think you mean the Antikythera Mechanism – I haven’t seen it but I understand there isn’t a lot to see unless you’re using X-rays…

I wonder if USB to digital I/O might be “fast enough” to fake up something with hardware that doesn’t have tight timing requirements?

Having said that, it depends what you’re after? If it’s a user port, the digital I/O should provide that. Alternatively there’s a range of I/O (analogue and digital) that can hang off the IIC bus…?

Podule I/O is at best 16MHz, while PCIe is a lot quicker, so a reasonably quick digital I/O card might suffice. USB is a bit trickier due to being higher latency, but can work if there’s a CPU at the other end to buffer whatever the data is.

The bigger question is: what do you want to do with the podule bus, and can it be done another way on a modern mahine?

If you want to connect legacy podules, which ones are worthwhile? The podule slots in Iyonix didn’t seem to get very well used. Most of the existing podules (storage, networking, etc) are already covered by modern interfaces.

If you want to connect to some GPIO-type things, then a microcontroller that speaks USB (eg Arduino) is a lot easier.

I can’t really see a niche for podules today – or indeed any other Risc PC era hardware. But happy to be proved wrong.