obtaining the peripheral base address of raspberry pi

For some of my projects using the raspberry pi I need to enable the watchdog timer and also I2S audio output because there is no way to achieve this within
RISC OS I need to know the peripheral base address for the raspberry pi that is currently being used.

As RISC OS has already identified the board and processor that it is running on, is there a way of obtaining the peripheral base address from within RISC OS by using HAL
access or something similar?.

It would just be useful rather than duplicating this code.

Also if someone knows where this section of code is within the sources can you post a link so I can have a look at what RISC OS does to identify each board type

TIA

From memory, I don’t believe you can get them via RISC OS. They’re fixed address though which you can find in the RPi Peripheral Addresses documentation.

The RISC OS source for the addresses is here and the source for the CPU detection is here

And here’s some example code from where we were trying to diagnose the Gamma lock-up issue on the Pi2:

REM Test gamma

IO_BASE=&3F000000
IO_BASE_SIZE=&1000000
SCALER=&400000
SCALER_DISPCTRL0=&40
SCALER_DISCBKGND0=&44
SCALER_DISPCTRL1=&50
SCALER_DISCBKGND1=&54
SCALER_DISPCTRL2=&60
SCALER_DISCBKGND2=&64
SCALER_DISPGAMADR=&78
SCALER_DISPGAMDAT=&E0

DIM code% 1024
FOR A%=0 TO 2 STEP 2
P%=code%
[OPT A%
SWI "OS_EnterOS"
MOV R0, #13
MOV R1, #IO_BASE
MOV R2, #IO_BASE_SIZE
SWI "OS_Memory"
ADD R3, R3, #SCALER

LDR R0, [R3, #SCALER_DISPCTRL0]
TST R0, #1<<31
LDRNE R1, [R3, #SCALER_DISCBKGND0]
ORRNE R1, R1, #1<<29                  ;enable gamma LUT
STRNE R1, [R3, #SCALER_DISCBKGND0]

LDR R0, [R3, #SCALER_DISPCTRL1]
TST R0, #1<<31
LDRNE R1, [R3, #SCALER_DISCBKGND1]
ORRNE R1, R1, #1<<29                  ;enable gamma LUT
STRNE R1, [R3, #SCALER_DISCBKGND1]

LDR R0, [R3, #SCALER_DISPCTRL2]
TST R0, #1<<31
LDRNE R1, [R3, #SCALER_DISCBKGND2]
ORRNE R1, R1, #1<<29                  ;enable gamma LUT
STRNE R1, [R3, #SCALER_DISCBKGND2]

MOV R1, #1<<31                        ;enable auto-increment
STR R1, [R3, #SCALER_DISPGAMADR]
MOV R1, #0
.L1
  STRB R1, [R3, #SCALER_DISPGAMDAT]
  ADD R1, R1, #1
  CMP R1, #256*3*3
BNE L1

SWI "OS_LeaveOS"
MOV PC, R14

]
NEXT

CALL code%

Hi Jon

Thanks for the information I already have the sound module and watchdog timer up and running on raspberry PIs but my detection routine was failing to identify some versions of PI boards correctly, It would just have been easier to get the address via RISC OS as it’s already identified the CPU and board.

Thanks again for the information I will study how RISC OS identifies the various boards.