Thinking ahead: Supporting multicore CPUs
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h0bby1 (2567) 480 posts |
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Rick Murray (539) 13840 posts |
I suspect you are doing the designers of such a system a disservice. If you think, the two kernels cannot be the same, by necessity. Work-arounds? Well, I guess you could implement a hardware interrupt controller so a core can freeze out the rest of the system while it does its work by polling the controller (can’t use interrupts, the other core(s) may answer; or start their own disc activity). Oh, and the entire disc structure will need to be reloaded before each write in case something else changed it (plus checking stuff like “was this file deleted?” and “is the one on disc newer?”. Result? Horrible. That sort of idea makes my head hurt. Alternatively, and more sensibly, we would have a secondary kernel on the secondary core, which looks and feels like the real kernel, but the devices are “virtual” and instead of accessing hardware directly, it just kicks everything over to the primary core, which is the one responsible for doing the actual hardware stuff. Two pertinent quotes from the Wiki page (my emphasis):
This isn’t a new problem. There is a long history of using multiple processors in the same system (and, indeed, Acorn has a somewhat unique history of using multiple alien processors in the same system!), so whether the processors are actual separate devices or cores within the same piece of silicon, that doesn’t make much difference. It isn’t new, it isn’t unknown. There are case studies and use results for a variety of implementations. None of them are absolutely perfect, but then the problem we are facing here is essentially two children with one toy. ;-) |
h0bby1 (2567) 480 posts |
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Steve Pampling (1551) 8170 posts |
What the hardware can do and what the driver element of the OS can do and what the OS overall can do for an application are very closely linked if your OS stops doing everything else (like talking to your app) because it is waiting for a hardware element to respond. RISC OS generally sits closer to the hardware, there is a penalty. Great for bare metal style operation, not so good for massively asynchronous like video display changes and a DNS request. Applications have to release control of the CPU or nothing else gets a chance. |
h0bby1 (2567) 480 posts |
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Gulli (1646) 42 posts |
hobby1, I don’t think people are as fixed on gaining performance increase with threading as you seem to think they are. Threading can be very useful for the exact opposite, performing background tasks that have a low priority but can be time consuming. Kicking off a thread to do some calculations for example while you continue to do other things in the front end. As such it can help give the illusion of speed and even help return the control to the user much sooner. |
h0bby1 (2567) 480 posts |
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Gulli (1646) 42 posts |
It may be easier to implement for the OS developers but how will it be for the average application developer? Sounds to me they would have to start developing for two separate back-ends with two different designs and methodologies? Hardly something to encourage new development. |
h0bby1 (2567) 480 posts |
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h0bby1 (2567) 480 posts |
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h0bby1 (2567) 480 posts |
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h0bby1 (2567) 480 posts |
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Gulli (1646) 42 posts |
On Windows, whether you write a console app, a windows application or whatever it’s still a subject to the same underlying PMT kernel. You seem to be suggesting (I may be misunderstanding you here) keeping a part of RISC OS as CMT and then somehow have a separate PMT exclusively for background tasks. That puts the developer in the situation of possibly having to build an application that runs both on a CMT and a PMT system on the same machine at the same time. |
David Feugey (2125) 2709 posts |
That’s what Wimp2 applications did. Some were compliant, and preempted. The other run in CMT mode. Best of two worlds (3, as you can go to monotask with CMT, if you keep all the CPU time for you). |
David Feugey (2125) 2709 posts |
Wimp2 was mainly a set of tricks. With timers in HAL and source code available, it would be much easier to implement it today. The idea is very simple: if my task is compliant, I’ll stop it after xxx cs. Else I will not. |
h0bby1 (2567) 480 posts |
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Gulli (1646) 42 posts |
OK, so you’re basically suggesting a similar route as others have suggested here – I guess I was misunderstanding you there! |
h0bby1 (2567) 480 posts |
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Rick Murray (539) 13840 posts |
Kindly look at the .Net runtime. I have deleted all but v1 from my system as the C: drive is a 4GiB SSD that Windows and its associated rubbish filled up. I would love to drop in .Net 3.5 (or whatever the latest is) but no, it doesn’t work like that. In order to be compatible with all the various versions of .Net, I need to have all the various versions of .Net.
Yes. Even to the point of rendering the system near unusable.
Depends. I have had Windows crash on a BSOD, but these days those tend to be “important” hardware problems that the only thing the OS can reasonably do is report it and die disgracefully. The last BSOD that I remember XP throwing was when the graphics card fan stopped on the NAS box and it all went wrong. Can’t get the fan to go, but the machine runs ‘stable’ so long as I stick to 640×480. Any more than that, the GPU overheats and the machine crashes. Wheee! I have had Linux suffer a peculiar error where the login process (I think?) died, so I couldn’t log in from keyboard nor could I telnet in nor did it respond to serial logins. The machine was still up, pinging it gave a response, but it was just dead to the user.
Sounds like the process handler sucks. Can’t it detect and throttle this sort of behaviour? Can a five line C program really bring a Linux system on its knees…in 2015?
It means “don’t cache”, in other words, always read the variable “live” from memory. The problem is, as you suggest, that a task can be switched out between reading the variable and making use of it. This isn’t a multi-core issue, it affects single core threads too.
From the kernel up is aware of this behaviour. Frankly, I think with RISC OS we would be better looking for a simple and compatible way to implement PMT-like behaviour within the Wimp. Something like the proposal I made a few days ago may be “doable” in a few weeks of part time coding by somebody knowledgeable of the Wimp’s internals.
No, the runtimes are not identical. But if the underlying kernel doesn’t support what is being asked, the only option is something like the RISC OS Wimp – which provides support for multiple tasks.
That’s more or less how Win32/NT deals with Windows 3.1x tasks. Personally, I would try to implement a “the Wimp can run this as a PMT task” for three reasons:
It’s a question of economics…
Code of that nature (USB, ethernet) should be working off interrupts from the respective hardware and be completely disassociated from the task switching stuff. If the back end raises an event to a UI-level process (an app), it is up to the UI handler (Wimp) to store the state for the application, and the application to request the data from the back end as and when it can, and for the back end to sensibly manage the data. PMT is ubiquitous because the two major OSs use it. But it isn’t the only game in town… |
h0bby1 (2567) 480 posts |
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h0bby1 (2567) 480 posts |
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Rick Murray (539) 13840 posts |
I’m not familiar with OSLib. Could it be written in assembler? A fair few parts of DeskLib are – you just shuffle the registers around then call the SWI…
I think it is “sufficient to do the job without reinventing the wheel”.
? That’s news to me. From what I recall, Niall was extremely fond of RISC OS 2 and somewhat hated RISC OS 3 (with all that nasty C code leaking in). This, perhaps, shows most clearly with this piece of code:
Gee. Thanks. [re. R3]
Because on the older machines, you had to bash the hardware directly if you wanted a fast timer. And hope that nothing else was doing likewise.
OSLib (like DeskLib, etc) is a library that makes it “nicer” to do stuff from C. The topology is roughly this:
The ones in italics are part of the firmware. The HAL ought to sit between the OS/kernel and the hardware, but it seems to me that a fair few things still talk directly to hardware. Not anything like as much as before, but some…
No. The Wimp is the UI and the back end for task swapping and the UI specific stuff. OSLib is… just a library. That translates higher level C constructs into something applicable for the OS. If you call a function with a name like wimp_poll and pass it a few pointers to data structures, the library will issue the SWI “Wimp_Poll” and mess with the registers either side of the call to get the right data in the right places. It’s easier than inlining __asm and trying to do it all yourself. I think I’ve mentioned this to you before. RISC OS is not Linux. The Wimp isn’t built from a pile of interacting libraries. It just “is”. And it is here, if you’re interested: https://www.riscosopen.org/viewer/view/castle/RiscOS/Sources/Desktop/Wimp/s/ |
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