Burning ROM chips for RiscPC

I’d like to get 5.17 blown onto ROM for a RiscPC.

Yes, I know this is pretty pointless. Yes, I understand it doesn’t all work. Yes, I know there won’t be any suitable network card drivers. And yes, I understand I’d be better off softloading. :)

Disclaimer aside, can anyone help me with the exact spec of chips (speed etc) I need? I have a chap who will burn the ROM for me.

Thanks

You need 2 of 27C160. There’s a tool somewhere in CVS which splits the ROMs (as you need the top 16 bits of each word in one ROM and the bottom 16 in another).

In the IOMD HAL it pokes 0×12 into the ROM speed register which corresponds to 93.75ns burst speed and 156.25ns random access, so the 27C160-90 speed grade looks to deal with both though you’d probably get away with 27C160-100 too provided you stick at room temperature.

Suffixes for package vary by manufacturer, for example ST declare M27C160-90B1 for commercial temperature grade in a DIP42.

Thank you very much Sprow, that’s excellent. [Turns out, though, that the guy who was going to make the ROM chips for me can’t do ones of this size. So it’s back to softload for now but I would still like to get it in chip form – anyone know anywhere who will do such a thing? Does ROOL have the equipment (for a fee, naturally)?

What happened to the Re-programable chips that were first used with RO 4?
How were they to be updated?

Will this version of RO5 work with RS or Is there a version that will directly load on RedSquirrel?

Perhaps there are others who’d be interested in this too (for novelty value)… especially in the longer term, e.g. 5.20+.

I am a relative newbe to the site so do not know what CVS is in the discussion about splitting RO Roms. I would like to find the utility mention to do the job for me rather than attempting it alone.

What happened to the Re-programable chips that were first used with RO 4?

Whilst they worked for me, there were quite a few reliability issues using these with the wide range of different motherboard, RAM and peripheral combinations.

How were they to be updated?

IIRC, they were swapped for another set with ROL each time. They obviously had a programmer for whatever type of PROM it was.

Most copies of RISC OS that RISCOS Ltd sold were PROMS (one time programmable ROMs) the PROMs were getting hard to source so Si-Plan developed the Flash ROM ‘Sledges’ for ROL. Unfortunately the cheap programmers available today only have a 40pin ZIF socket and RISC OS is 42 pin. I think I’ve seen adaptors that allow you program in half’s (or is it quarter’s?).

In the IOMD HAL it pokes 0×12 into the ROM speed register which corresponds to 93.75ns burst speed and 156.25ns random access, so the 27C160-90 speed grade looks to deal with both though you’d probably get away with 27C160-100 too provided you stick at room temperature.

I presume it wouldn’t be rocket science to change that value if you had slower chips.

I am a relative newbe to the site so do not know what CVS is in the discussion about splitting RO Roms. I would like to find the utility mention to do the job for me rather than attempting it alone.

CVS is the source control system that we used to use. A few years ago we stopped using CVS and transferred the sources to git (https://gitlab.riscosopen.org/).

However, I’m not aware of any tool in git for splitting the ROMs ready for writing to 16-bit ROMs. Maybe it’s just hidden in some deep, dark corner which I haven’t looked in.

Either way, it shouldn’t be that hard for someone to write a short BASIC program or similar to do the required work. After all, the core loop is just “read 2 bytes, write to file A, read 2 bytes, write to file B, repeat until EOF”

There is stardot topic on this. including C source for a tool to do the splitting, splitrom.tar.gz which unpacks with SparkFS.