Allwinner H3
Tristan M. (2946) 1039 posts |
I’ve been looking at the HAL USB sources. I’m a little confused by something in HAL_USBControllerInfo. It is there in both iMx6 and OMAP4. MOVHI pc, lr and MOVLO pc, lr. I honestly can’t work out what’s going on there. While I feel ignoring it is the best thing to do, I don’t like using copypasted code that I don’t understand. Especially because it has to be set up with 3 USB BUSses, +1 for USB OTG if I could be bothered. |
Jeffrey Lee (213) 6048 posts |
Sounds like you need to brush up on your condition codes. http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.dui0204j/Chdhcfbc.html Taking OMAP4 as an example, the CMP on line 142 splits the input into controller number into three categories: HI = out of range (so return via MOVHI pc,lr), EQ = controller 1, LO = controller 0. Then after a branch on EQ to separate out the #0 and #1 cases, we have the MOVLO pc, lr instructions to exit if the supplied buffer size is smaller than required. |
Tristan M. (2946) 1039 posts |
Jeffrey. I don’t know where my head was at. I kept thinking High and low 16 bit words. You’re absolutely right. Serves me right for trying to do it when i wasn’t in the right mindset. Just for the sake of it I tried adding USB today, because I realised the implementation was really simple. Just tried the first build. Almost, I guess?
RISC OS 1017MB Cortex-A7 Processor No keyboard present – autobooting *modules |
Jeffrey Lee (213) 6048 posts |
After adding a new module to the ROM (or changing one from ‘-type EXP’ to normal), make sure you do a ‘Export resources’ build phase. |
Tristan M. (2946) 1039 posts |
I did. I actually did a build through from clean because there was some problem with it not seeing contents of oslib headers that were definitely there. Until I did that the EHCI module wouldn’t build. Oddly enough the USB module built fine the whole time. |
Tristan M. (2946) 1039 posts |
Ohh. Wow. Here’s an example of the infuriating rubbish that I just can’t work out.
This one’s a real beauty! It would have happened almost instantly after starting to run the image. There’s some good hints to that. First being the stack dump exists. U-boot gets overwritten shortly. pc should be at 0×420xxxxx. 0×10 is the data abort vector. lr is 0×3. What? The weirdness of the errors is completely different every time. It’s not as if this is a machine freshly powered up. It’s passed through the BROM, FEL and U boot to get this far. It’s all these weird random errors during boot that have been causing me headaches. Strange thing is if it does manage to boot completely, there are no issues! |
Tristan M. (2946) 1039 posts |
I worked out why USBDriver lost it’s resources file after having a good look at the logs. Changing Territory to UK fixed it. |
Jeffrey Lee (213) 6048 posts |
Try packaging the ROM as a uimage file. I think I’ve seen some versions of u-boot fail to flush the caches when using fatload/go (meanwhile uimages will work fine, because that’ll be the image format the port maintainers care about) |
Tristan M. (2946) 1039 posts |
hmm. It’s worth looking into. I literally know nothing about it beyond vague memories of doing it via a menu when rolling my own Linux for H3/H5. I absolutely butchered the build scripts for my own purposes but that’s another story. Pretty sure I’m about the only person to do a native OS build of Linux on an Orange Pi instead of crosscompiling from PC though. Back on topic. I’ll look into it. Otherwise, next thing I’ll try is setting up that whole cache walking invalidation thing, which I really shouldn’t need to do but it’s worth a try. I got around to hammering away at this morning’s ROM build until it booted successfully to have a quick look at the properly built (but probably not properly implemented) USB. Looks good I guess. I wouldn’t know what I’m looking for though.
That looks good.
Good I guess?
? Going to assume that Interrupt is the number of interrupt events. I plugged the PC’s keyboard dongle in for a minute because it was in easy reach. I guess that’s where the interrupts came from. Question. If EHCI is implemented, do I / should I do the OHCI too? From the source I looked at I’m guessing a possible no? edit: I just plugged a random USB drive in. Looking good!
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Michael Grunditz (467) 531 posts |
Cool with USB!! Lucky you that ehci is connected to the usefull ports :) |
Tristan M. (2946) 1039 posts |
I had to look at your thread to work out how to go about it. I was extremely lucky with the way that USB is setup on the Allwinner SoCs. Everything is hardwired. I didn’t even need an init function to get this far. It’s just one port per bus. Funny thing is it has OHCI and EHCI for each bus. As I stated before I wasn’t sure what to do about that so I just did EHCI. There’s a USB OTG port too. It looks pretty easy to use as a host too, but I didn’t bother for now. |
Jeffrey Lee (213) 6048 posts |
That’s the standard arrangement – EHCI only supports USB2, so if a USB1 device is connected to the port it hands the port over to the OHCI controller. OMAP3 (and OMAP4?) are the same, except that hardware bugs/restrictions mean that the handover can’t be done, so those ROMs only run with EHCI (+ MUSB for the OTG port). In turn, this requires a hub to be connected in order to use USB1 devices via EHCI (which the BeagleBoard/PandaBoard designers solved by adding the SMSC USB+LAN chip to the boards). So yes, you’ll probably want OHCI enabling as well. You should be able to expose it via HAL_USBControllerInfo the same way as EHCI (although it might be a bit broken, since the only maintained platform that uses OHCI is the Iyonix, where the controllers are found via PCI rather than via the HAL) |
Colin (478) 2433 posts |
If want to leave OHCI until later you can still use a keyboard and mouse – or any usb device – if you plug them in via a usb2 hub. |
Tristan M. (2946) 1039 posts |
Jeffrey, as always extremely useful information. Jumping subjects again. I was genuinely surprised to not see any HAL entries for DMA. I felt there would be a memcpy or blt that would try to call a HAL DMA entry with a failover to a PIO method. Speaking of DMA and this platform. I’ve said it before, but it feels like a lot of copypaste went on. It has a DMA controller sith a lot of different channels to access different types of endpoints, and pretty much every device seems to have its own DMA controller too. Back to USB. Let’s say I wanted to mount a filesystem on a USB drive via SVC, can I even do that? If so, what bare minimum modules would I need? I just plugged it in to check what modules my current build has. Wahey! a brief walk down memory lane. Interesting.
Different errors every time, if any. Also I’ve been reading up about uImage, the u Boot header format for it, and also mkimage, which I might add is a very unfriendly program. It needs help to explain the help to get help on it. I can’t seem to get it to list the supported parameters like image types etc. |
Jeffrey Lee (213) 6048 posts |
Yes, ADFS will want DMAManager. It manages device-memory and memory-device DMA transfers. It controls the DMA HAL devices, which in turn are responsible for programming the DMA hardware. Each controller needs a controller device and one or more buffer or list channel devices. The documentation for DMAManager is a bit patchy – I think the SWI documentation on the wiki is complete (there was a big gap between me starting to write it up and then returning to it), but for anything else you’ll have to start with the documentation in PRM vol 5a and then overlay it with the documents in CVS that cover the changes that were made for HAL/RISC OS 5. However, you don’t want ADFS in your ROM. Although the native RISC OS disc format is often called ADFS (since that was its name in the BBC era), under RISC OS it’s actually the FileCore module which handles the native disc format. ADFS is just a hardware driver for IDE/SATA & floppy controllers, none of which I believe are present on the Orange Pi. For USB storage, SCSIFS is used. I listed (most of) the necessary modules for Michael over here – although as I said to Michael, if you’ve got timer 0 & interrupts working you should just be able to enable all the standard ROM modules and the system should start up OK.
The ROM builder has native support for generating uimages. You just need to add %subformat, %load_addr, and %exec_addr directives to the components file. See the OMAP5 one for an example; in your case you’d probably want both load_addr and exec_addr set to 0×42000000 (the OMAP5 HAL has a +64 offset inherited from OMAP3, where the first N words of the ROM image were different entry points for the different board types, followed by the generic uImage entry point) |
Tristan M. (2946) 1039 posts |
Thanks for all the info. I’m not 100% sure that legacy reasons is why OMAP has an offset for booting. If the load and boot address are 0×42000000 U-boot is going to try to start program execution at the beginning of the uImage header. I just popped open the freshly generated uImage (Thanks!!!) and had a look. The uImage header happens to be 64 bytes long. I’ll sort that in a tic. I tried out that image anyway. It got stuck on trying to boot the kernel, but that’s okay. It showed me some nice information beforehand, so it’s happy with the image format. |
Tristan M. (2946) 1039 posts |
I’m going to keep at it. If I manually “go” to the correct start address in the uImage it runs until it doesn’t, like usual. If I try to run it via bootm it throws a prefetch abort via the simple handler I put in. |
Jeffrey Lee (213) 6048 posts |
Incorrect – the addresses are specified as if the file has no header. |
Tristan M. (2946) 1039 posts |
Hi Jeffrey. I slept on this one. Something’s not quite right somewhere. A uImage can be loaded by u Boot either from media or from RAM via bootm. If I were to load the image to 0×42000000, that would be a bad thing as it would read the header, then try to execute the header. Next thing I’m going to try is to do a fresh version of my u Boot SD card, but with a small FAT partition, and a FileCore partition, set it up and see what happens. Anyway I’m going to try to get this done. |
Jeffrey Lee (213) 6048 posts |
If the location the image was loaded to overlaps the load address in the image header, I’d assume u-boot is smart enough to move it without overwriting/corrupting it. But I don’t think we’ve actually tried that. Whenever we use u-boot with RISC OS, I think we always specify an image load/exec address that’s different from the file load address. E.g. for OMAP5 I can see that the default fatload & bootm command sequence that’s compiled into u-boot loads the image to 0×80200000, but the load address specified in the uImage is 0×81000000. |
Tristan M. (2946) 1039 posts |
Interesting. It’ll probably be a little while before I can work through all this. I’ve spent my time today fighting with problems. Skipping the detail, I can’t get my OPiPC or PC2 to boot successfully into linux. Tried reimaging the PC2. The PC kept stopping. Usually at a specific point but many times at a random point during Linux kernel init. The USB voltage / current thing was telling me a healthy 5.2v. Current was 0.25A which is a little odd. Hmm. On the bright side I guess I did a fair bit of work on stability. Hopefully it’s vastly improved once I sort this cable issue. |
Tristan M. (2946) 1039 posts |
I more or less knocked up the bare basics of what I needed to pump some current into the OPi PC. It’s one of those prototyping boards (Not technically a HAT because it lacks the camera? ribbon cable hole). +5v is provided directly to the +5v GPIO pins via a 10A electronic relay. All the power wiring is trailer wiring, right up to the 5V, 5A PSU. Earth was a little trickier because the *Pi GPIO layout has them scattered. The prototyping board didn’t appear to have them all wired, and the ones that were all went to the board ground rail via a tiny little track or two. So there’s a whole heap of hookup wire soldered on to each GPIO GND pin to the ground rail individually. Unfortunately I had to wire the relay on for now and there’s no caps on the power rails either. I been able to readily salvage those yet. My previous plan of accessing a USB drive has a slight failure. I’m stuck on the prompt “Waiting for boot drive to be ready; press Escape to cancel.” |
Jeffrey Lee (213) 6048 posts |
You can patch the kernel so that it will skip trying to run the boot sequence and go straight to the command prompt instead – near the end of s.NewReset, change the BEQ DoStartSuper to B DoStartSuper. One quirk of the debug terminal is that although single-tasking keyboard input will come from HAL_DebugRX, you should still be able to use a USB keyboard to press Escape (assuming your USB is working to a sufficient degree) |
Tristan M. (2946) 1039 posts |
Changed to bypass the prompt as suggested. I’m seeing things that need some hard scrutiny. There’s some info from a debug function I put in Top.s which has me a little unsettled.
Should that be where the HAL_Base symbol is apparently located pre-MMU and pre ROM copy? e: Of course it should be. I’m displaying a value from the literal pool. I was clutching at straws. |
Tristan M. (2946) 1039 posts |
Been tinkering some more. Unfortunately I’m well and truly at the stage of throwing things at it and seeing what works. It got as far as booting again. Perhaps because of some HAL_Init SCTLR fiddling, or perhaps just luck. I ran a BASIC program and built a simple assembly program in it. I had to disable the SCSI modules again because they were causing lockups. Bypassing the keypress prompt for a boot filesystem didn’t actually work for the few times I got it to boot that far. Didn’t try too hard to trace the kernel code back to see what was actually happening. Progressing slowly but surely. Any suggestions for anything I can do with a minimal CLI system with no persistent media to test it? Here’s what this build has.
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