Just something not so important
nemo (145) 2546 posts |
Indeed, but in talking about OpenCL and emulators we are exploring ways in which non-ARM computation cores can be utilised, and Michael’s 64bit project is a useful case. I was using this to explore a more portable model that has application to the GPU, FPGA and Emulator cases. But even within the ARM family there’s great differences in floating point architecture, and this does entail multiple builds already. Code generation from an intermediate format obviates that. I suggested wasm as it is a RISC-like assembly language (with SIMD instructions) that maps quite directly to ARM, allowing efficient code generation on the various cores people are already using, while also not building-in a future emulation requirement.
This isn’t really the thread for that discussion, but I maintain strongly that you cannot have “RISC OS” as it is commonly understood multithreaded. You can have a small OS with some familiarly-named SWIs, but you cannot have the same API, implementation or behaviour on multiple cores. You must necessarily have only a small subset. Your mention of TaskWindow is illustrative:
It is just sufficient to run the most trivial of stdin/stdout utilities… and that is within the single-threaded model that almost all of the RISC OS API requires.
I’m not sure what you’re saying here. RISC OS is already multithreaded (it has interrupts! multiple stacks!), but few SWIs are re-entrant. So there has always been a huge difference between what the ‘foreground thread’ can do, and what ‘background threads’ are allowed. A multiprocessor model can either treat all other cores as background threads, or treat the cores more like separate computers on a network. What you certainly can’t have is multiple cores calling the vast majority of SWIs. This is why I think it’s much more useful to think of additional cores having a light Tube-like OS or, as is the wasm model, nothing but function pointers. You can’t have additional cores calling WindowManager, MessageTrans etc. You can’t have one core calling WrchV while another is issuing Byte,218 or 236. There are plenty of modules that sit on vectors and maintain a threading count to alter their behaviour (to avoid recursion) so you can’t have multiple cores calling the same vector simultaneously, so you need locks. This immediately leads to race conditions because vector claimants inevitably call other vectors. You’ve got thirty years of code and hundreds and hundreds of modules. This is why I keep saying that additional cores must be seen as computation units. The RISC OS API is basically Highlander when it comes to threads – There can be only one. |
Michael Grunditz (467) 531 posts |
https://twitter.com/QtARM/status/1199824296153100289 I need to stop doing demos! :D Half of my boot ups leads to blurry screen … so need to go back to that problem. |
Steffen Huber (91) 1953 posts |
And so I have read various docs and papers and blogs about WebAssembly and I am not really much wiser, so I’ll do the advocatus diaboli due to my sceptical nature about the wheel-reinventing nature of IT…
Faster: not according to the sources I read. In real-world benchmarks (i.e. a bunch of people rebuilding SPEC on WebAssembly), WebAssembly is half as fast as native code, while e.g. Hotspot Server JVM sometimes beats native code (once warmed up, or if jaot is used). Secure: Citation needed. Both the JVM and WebAssembly can do sandboxed execution. Whether one is more secure than the other seems to rest mainly on the quality of the implementation. In theory, both are secure. Smaller: it depends. I said “Java bytecode” for a reason – this does not include the whole Java SE platform. There are many embedded JVMs that come only with a small subset of Java SE platform, which is basically equivalent to the WebAssembly approach. And WebAssembly is a bit simpler, since I think it does not supply a threading environment and a GC.
There is no such thing “implicit” in Java Bytecode, and I most certainly did not ask for a comparison between WebAssembly and Java SE platform, which would not be a sensible comparison. Whether it is an advantage to have only a minimum runtime specified – it depends on the complexity of the task at hand. There is very little that basic WebAssembly can do right now (apart from running micro benchmarks quite fast…). Need a UI? Need networking? Need data structures? Welcome to library hell. And cross-platform hell.
LLVM IR might be non-portable because platform-dependant stuff was thrown out at the preprocessor level (something that WebAssembly also does not care for) – I cannot see how WebAssembly is different from LLVM IR from a portability standpoint.
Yes, I absolutely agree about the theoretical value of being able to use proven technology and code for CPU abstraction. However, it is unclear whether WebAssembly is a good long-term solution. At the moment, it is in a hype-state in Browser world. Such things tend to be sporadic sometimes. We are quickly heading for Chromium-Everywhere at the moment, which makes it difficult to judge if the future WebAssembly incarnation – if it will exist – will still be a viable solution for our use case a few years on from now. Whether the other two alternatives are better – I have no idea. Our legacy codebase is very much tied to the C family of languages, so the natural thing to choose would be LLVM – LLVM IR seems to be stable, native compilation is available (for the old-schoolers amongst us), and it is well-established. While I personally think that a minimal JVM (maybe JamVM) would be an interesting runtime platform, using languages which are typically compiled to bytecode has no tradition on our platform, so it would be an academic solution without going the whole hog and port the complete Java SE Platform (which is…erm…ambitious). But we (as in “The RISC OS community”) don’t even have the manpower to maintain the GCC ARM backend legacy targets to keep being able addressing all ARM variants from ARMv2 up to ARMv8.x with one binary. A pragmatic approach might be making source available via an Escrow-type arrangement to interested parties whenever ARM does their next backward-compatibility breaking change. But all that does not attempt to solve the whole multicore-heterogenous-multicomputing scenario. |
Rick Murray (539) 13840 posts |
Don’t forget different versions of said libraries. ;-) Thing is, Java (and its relatives) are trying to be a jack of all trades. Right now I’m listening to PPNR on a little Android app. There is no doubt that the app will have pulled in library functions to retrieve data, to stream audio, to handle controlling and using speakers and headphones. It’ll just call in prewritten libraries for all that, rather than reinventing the wheel. Trust me, if/when WebAssembly is mature, it’ll have a tonne of libraries, a mess of versioning, and all the cruft a mature thing accrues.
That’s the theory.
Nor my machine. But that’s not really the point. You or I could go and buy a Pi3/Pi4 and dive into AArch64, and be using ARM64 code within days (however long it takes for the hardware to arrive). You cannot say that of technologies like WebAssembly for which there currently exists nothing whatsoever for RISC OS; and at the very least would need some sort of compiler (it’s ARM32/64, could use an existing) and some sort of library. I think that – the library – is where you’ll come unstuck. There will be lots of expected behaviour, and I wonder how much will be completely alien to RISC OS’ way of doing things. Let’s just toss out some concepts – threads, subprocesses, and tasks. On other systems, there is a subtle but important difference between them, plus the expectation of being able to multitask processes “in the background” completely away from anything that even remotely resembles a GUI.
I don’t think anybody is claiming to know better. But perhaps one should not put those names up on a pedestal. For example, read this: https://developer.mozilla.org/en-US/docs/Web/API/Battery_Status_API Google. How about the proposals to change the WebRequest API which has the side effect of breaking numberous content blockers due to restrictions and limitations in the suggested declarativeNetRequest API. Google’s primary focus is not in improving internet security. Their primary focus is getting paid for advertising crap at you. Never forget that. WebAssembley is an interesting idea, certainly. Just not something I would want running on any of my systems. I’m afraid I have issues with random third parties thinking that they can run their code on my machine, especially given as how much junk an average website thinks it can include with its content. Most browsers, out of the box, are not able to selectively allow what can and can not run. This is why add-ons are so important, where things can be disallowed until they are explicitely marked as permitted. Trust me, WebAssembly will get attacked harshly when it is big enough to make it a worthwhile target. For what it’s worth, I’ll put my money on Michael. Some of the most interesting things are born of scratching personal itches. And yes, it might only work on certain systems right now, but he has already demonstrated code running on one of the other cores. Can you, or anybody, demonstrate anything even remotely to do with RISC OS when it comes to WebAssembly? |
nemo (145) 2546 posts |
Steffen wrote:
At worst. In some cases it’s within 10% of native. However, there’s clearly improvements to be had in code generation versus native compilation – I suspect register allocation will prove to be at the root of this.
Yeah precisely.
Ooh heavens. Endianness, structure alignment, size and sign of primitives. What does ‘char’ mean on your compiler/platform… because that’s what ends up in the LLVM IR.
There is no implicit library in WebAssembly (in general, though WASI aims to specify one). There cannot be any UI access from other cores (which is our specific usage case here). The code can only access functions provided by the caller.
Glad it’s not only me! ;-) My preference for wasm is because of its absolutely minimal scope – fixed memory, assembly code, caller-provided functions, and that’s all. JVM implies much more (including GC AIUI) and LLVM feels much more heavyweight (and is not as portable). Rick worried
A little background for those who haven’t trawled the specs: Your wasm code is given access to a single block of memory. It cannot access memory outside that. It does not know its address. It does not know the addresses of any functions. It cannot specify a memory address under any circumstances. It cannot allocate or free memory. It cannot open files. It cannot call the OS. It cannot modify itself. All it can do in general is return a value. You can give it some function pointers if you wish, in which case it can only call those. It is not a program in its own right, it is a computation thread, basically. It can be an infinite loop, but so can anything.
Are you suggesting I should implement a WebAssembly implementation for RISC OS in order to better argue for the implementation of a WebAssembly implementation for RISC OS? I see what you’re doing there and it won’t work ;-) |
Steve Pampling (1551) 8170 posts |
Seems a bit excessive to argue a point. A simple proof of concept would probably do. :) |
nemo (145) 2546 posts |
Well it’s not very compelling in isolation. A textual The code generation here is rubbish, but better than an interpreter. I am not proposing writing a good code generator. I believe ARM have already done so. The compelling bit is that the Heavens, it ought to be possible to write RISC OS Modules in any language that compiles to However, my suggested purpose is as a representation of a worker function that can be invoked on whatever additional computation engine you have available – other ARM cores whether 32bit or 64bit, GPU, FPGA, emulator host processor, or run locally on the same CPU. |
Michael Grunditz (467) 531 posts |
Why run one RISC OS , when you can run TWO (or more).. Bootlog, the error is me skipping filesystem things.. A53 Before OS_Start 0USDBM IL OlGo:g fb9odo8t 00f0f0a NVMemory_Init RISC OS 597MB Cortex-A53 Processor EError: Internal error: abort on data transfer at &FC045D90 (Error number &80000 |
Michael Grunditz (467) 531 posts |
And now video working display in window on A72 |
Michael Grunditz (467) 531 posts |
Just got desktop and usb on A53. I use one controller for each cpu. |
Rick Murray (539) 13840 posts |
Yeah… but isn’t it the “filesystem things” that’s most likely to blow up in this sort of scenario? ;-) Still… damn. |
Steve Pampling (1551) 8170 posts |
That was part of the logic behind me mentioning the JaffaSoft messaging setup – you just need to pass the messages round different instances. As Rick says “filesystem things” might be an issue but if only one instance has direct access to the filesystem and everything else goes via that. |
Michael Grunditz (467) 531 posts |
I implemented usb. Not optimal but the A53 run without error. Btw when is sprite and font area set? When booting the 53 they doesn’t get set. Had the exact same problem on rk3288. Works just fine on main riscos. |
David Feugey (2125) 2709 posts |
That’s basically AMP. Con: it’s not as transparent as SMP |
Michael Grunditz (467) 531 posts |
I can’t run a proper !boot. It crashes immediately. Is that related to missing areas? |
Jeffrey Lee (213) 6048 posts |
They’re created by InitHostedDAs |
Michael Grunditz (467) 531 posts |
That function is called, no error checking , need to add debug. Both cpus runs the same rom. The only difference is that the second one isn’t calling interrupt init. The first cpu sets affinity for the second, timer and usb. |
Michael Grunditz (467) 531 posts |
Setting defaults to something gives me desktop with bitmap font. ROM apps resets the cpu. Load from disc works, at least the benchmark. |
David Feugey (2125) 2709 posts |
Hum… http://riscoscloverleaf.com/ ? |
Martin Avison (27) 1494 posts |
Interesting. Seems to be incomplete in many areas, but it does mention Ahah! Facebook mentions ‘Planned crowdfunding start is April 2020.’ Perhaps this should be a new thread? |
Chris Mahoney (1684) 2165 posts |
“Sign up and get a discount Umm… Edit: Some broken links in the footer too. |
Rick Murray (539) 13840 posts |
Probably some boilerplate text to be something visual before actual content is available (like, perhaps, how the hell they plan to do this, and does it conflict with RODev’s current efforts?). What is more concerning to me is all the REDACTED when you look at the domain record. I know Germany has a strong concept of privacy, but I thought that hiding contact details from public view was for private individuals? So – lofty goals from an unknown wanting to raise money by crowdfunding… Hmm… |
Martin Avison (27) 1494 posts |
Stefan Fröhling (7826) and Aleksey Murushkin (Cloverleaf) (8233) have both posted queries here – and are the names near the bottom of the CloverLeaf main page. |
Chris Mahoney (1684) 2165 posts | |
Michael Grunditz (467) 531 posts |
Stefan was present at London show, and was demoing a work in progress chat client. |