Cortex A9

Hi!
has somebody started with a Cortex A9 Port (one core for the start)?

I know of at least one person who’s working on an OMAP4 port (and it’s not me!). I don’t think they’ve mentioned it on the forums yet, but I’m sure they will once they feel ready.

Would it utilise all the cores? I remember you said in another forum thread that it would be a long, long time before we saw any ROOL version that would utilise a dual core processor.

I also remember that there’d be no hardware acceleration on powerVR gpus due to a lack of a proper sdk, is there more likely to be hardware accelerated graphics on the nvidia Tegra 2 (and above) platforms?

I was actually thinking of asking about the A9 myself as I was considering buying an A9 Tegra II android tablet, which of course brought up memories of ROOL.

Chief :)

I don’t think they’ve …

I have an idea who it could be. There is one person who has recently written about threads and multiple cores.

Would it utilise all the cores? I remember you said in another forum thread that it would be a long, long time before we saw any ROOL version that would utilise a dual core processor.

No, not with the first versions I think. Maybe only with special uses for the second core and not with RISC OS and the Apps running on all cores.

I also remember that there’d be no hardware acceleration on powerVR gpus due to a lack of a proper sdk, is there more likely to be hardware accelerated graphics on the nvidia Tegra 2 (and above) platforms?
I was actually thinking of asking about the A9 myself as I was considering buying an A9 Tegra II android tablet, which of course brought up memories of ROOL.

I think its the same for the Tegra. I prefer the Snowballboard with ST Ericssons AP9500 CPU. It has a ARM Mali GPU and other a advantages over for example the panda board.
And there is also a tablet planed with the Snowball-hardware.

The reason I wondered about the Tegra was that Ubuntu supports it, which I presume would allow access to the driver source code. While obviously it’s a linux driver, I wondered if it may give alot of information away as to creating a tegra riscos driver. Also the price of the A9 tablet I’m looking at is incredibly cheap (one penny short of £150) due to sale price, while most of the other based on beagle/panda/A9 tablets are in the £250 range for the 10"s.

Would it utilise all the cores? I remember you said in another forum thread that it would be a long, long time before we saw any ROOL version that would utilise a dual core processor.

It’s just the one core for now (or at least I think it is!)

I also remember that there’d be no hardware acceleration on powerVR gpus due to a lack of a proper sdk, is there more likely to be hardware accelerated graphics on the nvidia Tegra 2 (and above) platforms?

I haven’t checked, but I’d be very surprised if the Tegra 2 GPU drivers were fully open source.

Just to say, I didn’t mean the official nvidia drivers. I gather from past experience that Ubuntu themselves make modified drivers from open source drivers to support cards.
I reckon these official ones are closed source.

A Tegra port of RISC OS would be great – Toshiba’s AC100 really sucks with Android, and it is very cheap and would be an ideal RISC OS platform. Unfortunately, NVidia is not exactly the most open company when it comes to specs for their chips. It took ages before the first half-working Linux for the AC100 was released.

Another promising target for RISC OS is the Asus Pad Transformer: Tegra2 tablet with dockable keyboard.

nVidia are still playing the ‘if you aren’t buying more than 100,000 we aren’t talking to you’ game on their forum. However there’s an OEM for a EUR99 Tegra module (Toradex Colibri T20 ), which has some hardware details. There are EUR100-200 motherboards for it too, one of which comes with schematics. It looks like Toradex are just telling customers with hardware info requests to talk to nVidia, but maybe worth a try anyway.

Another OEM says they support small/medium commercial projects: Avionic Design
Meanwhile there’s a Tegra ‘desktop’ machine (the TrimSlice ).

nVidia’s support looks truly hopeless: they don’t publish sales contact details on their website, so if you do want to buy a million units there’s nobody to talk to. And if you try to buy a dev board, they don’t reply to your requests.

Another idea, in conjunction with the Linux source, is to watch kernel execution through the PTM (Program Trace Macrocell) that’s in A9. TrimSlice gives you a JTAG port to do that. Someone’s working on a PTM Decoder . I don’t know how much middleware is required to pull out PTM traces over JTAG. Edit: Looks like OpenOCD (open source, cheap JTAG hardware) has preliminary A9 JTAG support.

Edit edit: done some more digging. I think TrimSlice would be the best way to start a Tegra port. There’s a UART and JTAG (the Tegra JTAG docs being mostly closed, of course, but might come in handy for reflashing, analysing their firmware, etc). The TrimSlice wiki describes how to generate an image to run off their bootloader. From the Linux source there’s enough information to get a serial port up, I think.

This is RISC OS 5.17 running on an OMAP4430 (Pandaboard).
And here are first benchmark results.

Screenmode: X1280 Y1024 C16M

FracVFP V0.2 by Michael Kuebel
                               Panda       Panda       IGEPv2
                               600 MHz     1 GHz       720 MHz
Result Single Precision
TIME taken [ms]              = 451         268         2128
Iterations calculated        = 177944574   177944574   177944574
Speed in [1000 Iterations/s] = 39455       66397       8362

Result Double Precision
TIME taken [ms]              = 512         304         2492
Iterations calculated        = 177936156   177936156   177936156
Speed in [1000 Iterations/s] = 34753       58531       7140
FracNEON V0.2 by Michael Kuebel

Result Single Precision
TIME taken [ms]              = 175         104         154
Iterations calculated        = 177944574   177944574   177944574
Speed in [1000 Iterations/s] = 101682      171100      115548

For comparison I have added the results of OMAP3530 (IGEPv2).

The state of the OMAP4 HAL is the following:

- I am struggling with the display driver (not all modes are working)
- Sound is not yet working; I have requested docs from TI for TWL6040

Otherwise the desktop is already usable, I have tested some standard programs
(ArtWorks, TechWriter, StrongED, …) which are all working like on the Beagle.

BTW the different CPU speeds (600 MHz or 1 GHz) are achieved by using different
MLO files; it is not (yet) handled by RISC OS itself.

FracVFP V0.2 by Michael Kuebel  Panda           Panda           IGEPv2
                                600 MHz         1 GHz           720 MHz
Result Single Precision
TIME taken [ms] =               451             268             2128
Iterations calculated =         177944574       177944574       177944574
Speed in [1000 Iterations/s] =  39455           66397           8362

Result Double Precision
TIME taken [ms] =               512             304             2492
Iterations calculated =         177936156       177936156       177936156
Speed in [1000 Iterations/s] =  34753           58531           7140

FracNEON V0.2 by Michael Kuebel

Result Single Precision
TIME taken [ms] =               175             104             154
Iterations calculated =         177944574       177944574       177944574
Speed in [1000 Iterations/s] =  101682          171100          115548

Impressive figures, especially for the VFP.

Great to see my benchmark running in the Pandaboard ! I’m also stunned by the VFP result. I knew it should be at least double due what I see in the A8/A9 specs, but also Out-Of-Order seems to help, 6 times faster clock by clock ! Neon is only up about 7% faster clock by clock.

Now I wonder about Integer performance. I don’t really have a pure integer benchmark. But may be you can test my FireBench ? It’s more like a mix between integer and memory performance.

So will we have soon a BIC or ARMini with the Pandaboard ? :-)

I have requested docs from TI for TWL6040

I take it you used this address?

So will we have soon a BIC or ARMini with the Pandaboard ? :-)

The PandaBoard is subsidised by TI, so guaranteed supplies at the current price are unlikely. Remember also that the prospect of a stable OMAP3 release has only been seriously contemplated just recently.

A BIK with a PandaBoard would be renamed to be a PIK of course ;-)

I have a Cortex-A9 board here (snowball) which i could use to test some things.
Is there code available for a Cortex-A9 HAL?

I think you may be misunderstanding things a bit. The kernel deals with the CPU, while the HAL deals with the hardware that surrounds the CPU. That means that the HAL which Willi is working on will only ever work on boards which use an OMAP4 SoC. The snowball board uses a ST-Ericsson Nova A9500 SoC, so if you wanted to run RISC OS on that you’d have to write a new HAL from scratch.

@Jeffrey: makes a lot of sense. So to get started a HAL is needed which i will have to write myself but the Cortex-A9 will be supported by the kernel?

The documentation of the A9500 has just been released so there is some documentation to get started, i won’t have a lot of spare time so this is not going to be viable any time soon. I might order a pandaboard to keep up with the developments here. That could help later on for a possible HAL for the A9500.

thanks for the swift reply!

So to get started a HAL is needed which i will have to write myself but the Cortex-A9 will be supported by the kernel?

Yes, that’s right. There is a small amount of work which needs doing to the kernel in order to support the Cortex A9, so if you make a start on an A9500 HAL before Willi submits his code then it might be worth getting in touch with him to see what he had to change. Plus there’s the porting guide on the wiki which you should (hopefully!) find useful.

@Jan: I also would like to use RISC OS on the snowballboard (I haven’t ordered one jet but planing to do so) and unfortunately I also have not much spare time.
Did you buy the board for RISC OS or for another usage?

I have asked on the igloocommunity-user-mailing-list for the missing datasheets for AV8100 and AB8500. No reaction till now :-(

First I try get more used with the new ARM-Chips, the inner details of RISC OS and the porting itself.
You (or any other (Willi?)) could if you like contact me at: MatthiasF at gmx dot net.

@Jeffrey: Thanks for updating the porting sites on the wiki, yes they are very helpfull (don’t hestitate to add further details ;-)

And there is also a tablet planed with the Snowball-hardware.

This TAB-S9500-ULP-C01? (Not to be confised with Snowball :: Tablet Arm!)

This TAB-S9500-ULP-C01? (Not to be confised with Snowball :: Tablet Arm!)

Erm, yes I was refering to the first one. But when I read this flyer again, it is clear that this will only be a development platform, not a real tablet :-( Sorry if I had generated unfounded hopes.

But at least there is a reaction about the missing datasheets, the release is planed for mid september.

I think TrimSlice would be the best way to start a Tegra port. […] the Tegra JTAG docs being mostly closed, of course […]

So, do the Terms of Use prevent the open sourcing of any future Tegra HAL for RISC OS? If so, then perhaps the docs could be looked at under an NDA, with the necessary ROM being built using a closed source HAL. With the apparently imminent release of the Tegra3 Asus Eee Pad Transformer 2, it would be handy for ROOL/individuals to have registered developer status if this can be arranged. If we’re sure the docs will be available then we could perhaps have a bounty for purchase of a dev board /TrimSlice/Transformer. Maybe I’ve missed a discussion somewhere but I don’t know how far any enquiries with nVidia have got.