Trim slice

Hi everone just got a spare trim slice with a tegra 2, how do we go about starting a risc os port or is it not possible?
It is currently running Unbuntu it has a Uboot loader and will boot from an sd card.
will the video be the problem or the other hardware ??
as the iyonics has gforce video will looking at how this works give me any pointers??
there is an RS323 and 2 HTMI 4 USB 32Gb SSD Etc.

Is this nvflash thing of any relevance?

Looks like I am on my own then, i better start reading all the doc’s i can and have a look at the other ports, so that i can get my head around how big the problems are.

As there’s no docs, /everything/ will be a problem :(

However… what I would do is grab the Linux kernel source and make sure you can build and boot it. Then find out at what address the serial port lives (possibly from the Linux source). Write something that looks like a minimal Linux kernel, that just outputs ‘A’ (or whatever) to the serial port. See if you can boot that. Then start working on the RISC OS source (see the guides on this site) and try to make it build something that looks like a Linux kernel and outputs ‘A’. Then you can gradually start adding in bits of RISC OS, writing drivers along the way.

A very handy set of tools is iotools – that allows you to see registers from Linux. For example, the Raspberry Pi dmesg says:

sdhci: Secure Digital Host Controller Interface driver
sdhci: Copyright(c) Pierre Ossman
mmc0: Unknown controller version (2). You may experience problems.
mmc0: SDHCI controller on BCM2708_Arasan [platform] using platform's DMA
mmc0: BCM2708 SDHC host at 0x08300000 DMA 4 IRQ 20

If I do

iotools mmio_dump 0×08300000

(actually I get a completely different address on my board’s dmesg, but it’s the same idea)

My Dell Mini 9 laptop also has an SDHCI controller, but that’s a PCI device so dmesg doesn’t give its address. So I have to read the PCI configuration registers using iotools first to find out where in mmio space it lives before I can read it. The address can also be found using ‘lspci -vvv’

In terms of graphics drivers, are there any open source GPU drivers for the Tegra (even lame VGA ones)? That would probably be the best starting point… I’m not sure if the ancient Iyonix video system will be much help. Worth a try though.

I just wrote up a slightly longer form of the above at:
https://www.riscosopen.org/wiki/documentation/show/Notes%20on%20reverse%20engineering
Anyone, feel free to expand if you have any helpful tips

See https://www.riscosopen.org/wiki/documentation/show/How%20to%20port%20RISC%20OS%20to%20new%20hardware
for how to get started in general

Looks like I am on my own then

Rob, did you see that NVIDIA "are working on a public TRM"? Perhaps devslice.com will have a bit more activity in the near future…

the news so far hooked up the trim-slice to serial port tried the omap 4 port it starts to boot gets a far as reading risc os.

registered as an nvidia deveploper applied for the public TRM, been going though the suggested reading & looking at the Unduntu boot doc’s.
Need some info about what the hal loads first the stucture and order that it uses??? to boot risc os kernel.

For HAL documentation: See here

For general porting hints/tips: See here

For an overview of the OMAP3 HAL: See here. That page is probably a little bit out of date, but the overall structure of the source code will be the same. It’s also a fairly similar structure to the other HALs (e.g. in all the HALs currently released, s.Top is the file containing the entry point).

I wouldn’t expect you to be able to make much progress without access to the Tegra 2 TRM. But if you can work out the addresses of the serial ports and the RAM then that would allow you to confirm that your code is being loaded properly, and allow you to put in code to call RISCOS_AddRAM, etc.

Good luck!

Just a quick note we where inducted into the nvidia developer community today and we now have access to tegra 2 TRM looks like i have some late night reading to do, along with all of my real work.
As Bamber aways used to say i’ve started so i will finish any pointers jeffery on where to start?? there are 1399 pages.

we now have access to tegra 2 TRM

Excellent!

any pointers jeffery on where to start??

The best place to start would be the chapter on the serial/UART interface. Once you know the address of the serial port registers, you can write some test code to print out a message, compile it (BASIC assembler will do!) and get u-boot to load and run it. This would correspond to steps 2 and 3 of my ‘not quite ten step plan’.

It’s probably best to try following the porting guide, and reading each chapter of the TRM as required. E.g. when you reach step 6 you’ll have to read the chapter on the RAM controller, so your HAL can report the available memory to RISC OS. Then for step 8 you’d need to read the chapters on the interrupt contoller and timers. For step 9 (and beyond!) it’s up to you, really. I’d be tempted to look at either the display controller or the USB controllers, since they’d provide the biggest improvement to the usability of the port.

Just a quick note we where inducted into the nvidia developer community today and we now have access to tegra 2 TRM looks like i have some late night reading to do, along with all of my real work.

Rob, knowing you’re extremely busy, I’ve added a link for registration to obtain the TRM to the docs page. Maybe you’ll be able to share head-scratching with a few others at some point in the future!

Any progress on Tegra 2 porting these days?

Any progress on Tegra 2 porting these days?

Or later Tegra implementations? Some with an array of peripheral connections:

http://http://emea.kontron.com/products/boards+and+mezzanines/embedded+motherboards/miniitx+motherboards/ktt30mitx.html

Since nvidia were hacked, they seem to have pulled all the ‘Developer Zone’ stuff from their website, including any means to register interest in the TRMs. I note that there’s 2000 pages of Tegra 3 TRM available on a filesharing site, but can’t seem to find the Tegra 2 TRM anywhere.

Well I just tried to upload a relevant file but I got “Content size (14376 kilobytes) exceeds the maximum (10240 kilobytes) set for this wiki”. The front page says “v01p SEP 14, 2011 Public release to support open development” so I guess it’s fair game. I can’t take the credit for sourcing it but am happy to pass it around. Please see me at tomorrow’s show and/or I’ll split into 2 files and upload here that way.

Tegra 2 TRM

(In case anyone from NVidia is reading this, this is marked as public information and I didn’t receive it (or indeed any documentation whatsoever) under the Tegra Developer Program)

Nice one, thanks Theo :-)