Batch Three source code released
Posted by Andrew Hodgkinson Fri, 22 Feb 2008 15:33:00 GMT
Cambridge, 22nd February 2008
Castle Technology Ltd (Castle) and RISC OS Open Ltd (ROOL) are pleased to announce the release of Batch Three of the RISC OS source code, following on from the first release in May and second release in October.
This release focuses on some of the more low level components in the operating system, including the USB stack, DeviceFS, DMA manager and operating system internationalisation modules. Network programmers will be pleased to at long last have access to the TCPIPLibs source code.
Licensing of the released RISC OS software is covered by a free of charge (FOC) Licence which gives an individual/company the right to download, modify and publish RISC OS source code provided it is not sold as part of a hardware product. Full details of the FOC licence are available from the Castle web site at http://www.castle-technology.co.uk/riscosbaselicence.htm. Details are also available in the source archives.
Download process
Please visit the downloads page to download and install the build environment. Documentation inside the archives describes how to integrate the build with the AcornC/C++ tools. If you do not have the tools, then these can be obtained by contacting ROOL at info@riscosopen.org. Then download the sources of interest and build them.
Administration by ROOL of RISC OS is being performed on a not-for-profit (NFP) basis and is therefore dependent upon contributions from the community to help support the operating costs. Users can contribute via the donation mechanism in the sidebar.
About RISC OS Open (ROOL)
In addition to managing the source opening activity, ROOL provides services for customers wishing to deploy RISC OS commercially. ROOL delivers value to its clients by being an expert in the design, development and integration of products built around ARM compatible processors. The core team of ROOL’s engineers originally formed the nucleus of Pace’s Cambridge Internet Protocol Television (IPTV) development team and previously worked for Acorn Computers. The experienced team is able to help partners and customers to quickly integrate, optimise and deploy efficient RISC OS based solutions in order to take advantage of the market leading MIPS per watt performance of the ARM architecture. ROOL are able to author software for an existing hardware design or develop a complete hardware and software solution. The engineering team has already developed and deployed RISC OS based products such as IP set-top boxes and desktop computers, including the IYONIX PC.
About RISC OS
RISC OS was designed in Cambridge, England by Acorn for their 32-bit ARM based Archimedes computer and was first released in 1987. RISC OS was specifically developed for the ARM core and its origins can be traced back to the original team that developed the processor architecture. In 1999 the rights to RISC OS were acquired by Pace and then in 2003, by the present owner, Castle.
The RISC OS platform has been deployed in over a million Consumer Electronics (CE) products. Product solutions based on RISC OS are sophisticated, proven, reliable and mature, having had over 600 man years of development to date. RISC OS products are universally recognised as faster, more reliable and more efficient than many comparable competitive products.
