Entry | |
---|---|
R0 | 0 |
Exit | |
---|---|
R0 | Flags |
R1 | Pointer to interrupt trigger routine, or 0 if no routine is necessary |
The purpose of this call is to return what is required to run code on the current hardware platform. The returned flags are influenced by both the properties of the CPU and the properties of the OS.
New flags are added to the return value in R0 in a backwards-compatible manner. Therefore, on machines where this SWI isn’t implemented (versions of RISC OS prior to 3.7) your code should act as if all the flags are set to zero. This can be done, for example, by checking if the SWI returns an unknown SWI error (error number &1E6). However care is still required with some flags, such as bit 11 (see the list of flags for more details).
The routine returned in R1 is used to help trigger interrupts on CPUs where pending interrupts won’t be triggered as soon as the I bit is cleared. Enable interrupts and then call the routine to ensure that any pending interrupts have been processed. The routine is suitable for calling from any CPU mode, and preserves all flags and registers, and is reentrant.