Showing changes from revision #0 to #1:
Added | Removed | Changed
Entry | |
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R0 | Start address (inclusive) |
R1 | End address (exclusive) |
Exit | |
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- | All registers preserved |
This SWI implements a ranged IMB operation, equivalent to calling OS_SynchroniseCodeAreas with R0/R1 shuffled up to R1/R2 and R0=1.
This SWI was introduced in RISC OS 5, and is one of a pair of OS-agnostic SWIs which the ARMv5 ARM recommended that operating systems should implement (see ARM DDI 0100E, section 2.7.4). More recent versions of the ARM ARM do not include these recommendations. Unless you are writing software which aims for compatibility with other operating systems which are known to implement these SWIs, it’s recommended to use the RISC OS OS_SynchroniseCodeAreas SWI instead, as that will provide compatibility with a wider range of OS versions.