About RISC OS (changes)

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Programmer's Reference Manuals

» About RISC OS

RISC OS is an Operating System that was originally developed by Acorn Computers Ltd to take advantage of the ARM microprocessor for a range of high end personal computers. In 2003, Castle Technology Ltd purchased the intellectual property to RISC OS, and in 2006 RISC OS Open was formed to facilitate the process of publishing the sources.

RISC OS 5 is the fifth major iteration of the Operating System. The sources and softload images are available here.

RISC OS is pronounced ‘risk oh ess’, but should be typed as RISC OS, as it is an acronym for Reduced Instruction Set Computer Operating System.

History

Although RISC OS personal computers were first released in 1987, the OS includes code to provide backwards compatibility with an earlier, now obsolete, Operating System called Arthur.

The first version of RISC OS was – strangely – called RISC OS 2, perhaps because the earlier Arthur Operating System was version 1. Over the years, RISC OS was updated to reflect the needs of users, as well as to take advantage of improvements in hardware. A list of all major versions of RISC OS is available here.

Castle Technology Ltd currently own the intellectual property of RISC OS, OS and Developments Ltd currently own the sources intellectual are property made of available under various licence schemes via theRISC OS, and the sources were made available under the Apache 2.0 licence in October 2018, via the RISC OS Open website. Another stream of RISC OS was developed by a commercial company called RISCOS Ltd until 2009, though this stream branched off from Castle’s version around version 4.xx and so the source code to RISC OS 5 is substantially different to that version. Features in one stream may not necessarily exist in the other, and vice-versa.

This Programmers Reference Manual is for RISC OS 5, and includes information for previous versions of the Operating System. It contains only passing references pertaining to RISCOS Ltd’s stream where for example a discrepancy is known.

Licences

RISC OS and related software available from the RISC OS Open website are made available under various licence schemes. Please do not assume that all of the software that you can download from the site is published under the same licence terms. More information is available here.

Facilities

RISC OS is a mature and sophisticated Operating System. Broadly speaking, its facilities can be categorised as follows:

1. Software Interrupts, or SWIs for short, are a set of powerful interfaces for the developer to interact with the Operating System. You can think of these as low level APIs.
2. A range of *Commands that can be issued from the command line and from applications to perform a range of simple tasks.
3. Low-level routines, such as interrupt handling.

Structure

Hardware Abstraction Layer

RISC OS 5 implemented a Hardware Abstraction Layer (HAL) in order to provide a level of independence from any given hardware platform. Originally, RISC OS was designed to run on a small range of ARM hardware using proprietary chipsets from Acorn Computers Ltd. As the availability of many different ARM processors from a range of semiconductor companies increased, more abstraction became desirable. For more information on the HAL, see here. For more information on supported hardware platforms, see here.

Modules

RISC OS has a kernel that is responsible for the overall control of the Operating System. Extra functionality is provided by various pieces of code called system extension modules or modules for short. Each module is responsible for a specific task, such as font handing, filer windows or sound scheduling. The end result is a modular Operating System that can be easily developed, updated and extended.

Each module conforms to a standard format so that the Operating System can register and integrate each one into the overall system. Because each module is self-contained, developers can easily add new modules to the system or create replacement modules. Modules developed to replace existing modules must provide the same entry points, and return values in exactly the same way as the original to ensure compliance with existing software. More information on modules is available here.

Vectors

Another important aspect of RISC OS is vectors. A vector is a chain of entries that determines which part of the system will perform a specific function. Vectors can be claimed and redirected so replacement code performs the required task. Like replacement modules, any claimed vectors must handled by the replacement code in the same way. This is achieved by the use of SWIs, as these specify the exact input and output of each vector.

Some vectors are used by just one SWI, while others are used by several SWIs because they perform a similar function. It must be noted, however, that some vectors are not used by SWIs at all, but instead only by the Operating System itself. This means that developers cannot claim these vectors. More information on software vectors can be found in here. Information on hardware vectors can be found here.

Programming Languages and Build Tools

RISC OS was designed to achieve a high level of performance even on slow ARM processors, and this was achieved by writing key parts of the Operating System using ARM assembly language. Much of the kernel and driver software is written in hand-optimized ARM assembler, making it a high performance OS solution for the ARM architecture and allowing it to operate in a minimal memory footprint. Other parts of the Operating System are written in C.

As the performance of ARM processors has increased significantly since the introduction of RISC OS, the preferred language to use when developing the Operating System and new software is now C/C++. To develop and build RISC OS from the sources, the RISC OS development kit is required, which includes the full C/C++ compiler, build environment and other useful tools. This is available for purchase here.

Loading the Operating System

Originally, RISC OS was supplied on ROM chips, rather than the more traditional method of hard disc or floppy. The benefit of this was twofold:

1. Loading the Operating System from ROM was faster than loading it into RAM memory via hard disc or floppy
2. Having the Operating System stored on ROM meant it could not be lost or damaged by viruses or malicious software

With the introduction of fast and inexpensive memory and hard discs, RISC OS can now be soft-loaded from disc, rather than from ROM. This has the benefit of making it easier to update the Operating System as improvements are made. Soft-loading RISC OS can achieved by either the ROM-based version of RISC OS, or an earlier boot loader such as U-Boot (the Universal Bootloader). This is useful when porting RISC OS to new ARM hardware platforms.