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The entry for DiscOps does much of the work for a DiscOp SWI. It is passed the same values as FileCore_DiscOp, except:
If bit 8 of R1 is set, then transfer may be wholly or partially in the background. This is an optional extension to improve performance. To reduce rotational latency the protocol also provides for transfers of indeterminate length.
R3 points to a list of address/length word pairs, specifying an exact number of sectors. The length given in R4 is treated as the length of the foreground part of the transfer. R5 is a pointer to the disc record.
Your module should return to the caller when the foreground part is complete, leaving a background process scheduled by interrupts from the controller. This process should terminate when it finds an address/length pair with a zero length field.
The foreground process can add pairs to the list at any time. To get the maximum decoupling between the processes your module should update the list after each sector. This updating must be atomic (use the STMIA instruction). Your module must be able to retry in the background.
The list is extended as below:
Offset | Contents |
---|---|
-8 | FileCore Error Number |
-4 | Process status |
0 | 1st address |
4 | 1st length |
.. | .. more address/length pairs |
n | Loopback marker -n (where n<-65536) |
n+4 | Length of zero |
A negative address of –n indicates that your module has reached the end of the table, and should get the next address/length pair from the start of the scatter list n bytes earlier.
Your module may be called with the scatter pointer (R3) not pointing to the first (address/length) pair. So, to find the addresses of Process error and Process status, you must search for the end of list. From this you may then calculate the start of the scatter
block.
The bits in process status are:
Bit | Meaning when set |
---|---|
31 | Process active |
30 | Process can be extended |
0-29 | Pointer to block giving position of any error |
Bits 31 and 30 are set by the caller and cleared by your module. Your module must have IRQs disabled from updating the final pair in the list to clearing the active bit.