HAL interrupt handling API (changes)

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Hardware Abstraction Layer

» List of HAL APIs

» HAL interrupt handling API

The HAL must provide the ability to identify, prioritise and mask IRQs, and the ability
to mask FIQs. RISC OS supplies the ARM’s processor vectors, and on an IRQ calls the HAL
to request the identity of the highest priority interrupt.

IRQ and FIQ device numbers are arbitrary, varying from system to system. They should be
arranged to allow quick mappings to and from hardware registers, and should ideally
be packed, starting at 0.

Entry points

Items marked ¶ are internal calls for OS use only; their functionality and availability is subject to change without warning. User programs interested in using these calls should instead use the equivalent RISC OS SWI call (if available).

• HAL_IRQEnable
• HAL_IRQDisable
• HAL_IRQClear
• HAL_IRQSource
• HAL_IRQStatus
• HAL_FIQEnable
• HAL_FIQDisable
• HAL_FIQDisableAll
• HAL_FIQClear
• HAL_FIQSource
• HAL_FIQStatus
• HAL_IRQMax ¶
• HAL_IRQProperties ¶
• HAL_IRQSetCores ¶
• HAL_IRQGetCores ¶

Information source: Kernel.Docs.HAL.HAL_API in CVS