HAL_NVMemoryType (changes)
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Hardware Abstraction Layer
HAL entry points from RISC OS
ยป HAL_NVMemoryType
HAL_NVMemoryType
(HAL entry #23)
unsigned int HAL_NVMemoryType(void)
| Entry | |
|---|---|
| - |
| Exit | |
|---|---|
| Bits 0-7 | 0 => no NVMemory available |
| 1 => NVMemory may be available on IIC bus | |
| 2 => NVMemory is available on the IIC bus, and the device characteristics are known | |
| 3 => the HAL provides NVMemory access calls | |
| Bit 8 | NVMemory has a protected region at the end |
| Bit 9 | Protected region is software deprotectable |
| Bit 10 | Memory locations 0-15 are readable |
| Bit 11 | Memory locations 0-15 are writeable |
Use
If This bits is 0-7 an are internal 0 call or for 1 OS no use other only NVMemory calls need be available, and bits should not be used by user software.
8-31 should be zero.
If bits 0-7 are 2, 0 or 1 no other NVMemory calls need be available, and bits 8-31 should be zero.HAL_NVMemorySize, HAL_NVMemoryPageSize, HAL_NVMemoryProtectedSize, HAL_NVMemoryProtection and HAL_NVMemoryIICAddress calls must
be available.
If bits 0-7 are 2, HAL_NVMemorySize, HAL_NVMemoryPageSize, HAL_NVMemoryProtectedSize, HAL_NVMemoryProtection and HAL_NVMemoryIICAddress calls must be available.
If bits 0-7 are 3, all calls except HAL_NVMemoryIICAddress must be available.
Note that if the OS is using IIC to talk to the NVMemory (i.e. bits 0-7 are 1 or 2) then only IIC bus 0 can be used for the location of NVMemory.
See also
Information sources: Kernel.Docs.HAL.HAL_API, Kernel.s.PMF.i2cutils, HAL.Tungsten.s.NVMemory in CVS
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