IMB_Range ARMop (changes)

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» IMB_Range ARMop

IMB_Range ARMop

Use

An instruction memory barrier (IMB) is to be performed over a logical address range.

Notes

R0 and R1 must be aligned on cache line boundaries.

An IMB is an operation that should be performed after new instructions have been stored and before they are executed. It guarantees correct operation for code modification (eg. something as simple as loading code to be executed).

On some ARMs, this operation may be null. On ARMs with harvard architecture this typically consists of:

1. Clean data cache
2. Drain write buffer
3. Invalidate instruction cache

There may be other considerations such as invalidating branch prediction caches.

Note that the range may be very large. The implementation of this call is typically expected to use a threshold (related to Cache_RangeThreshold) to decide when to perform IMB_Full instead, being faster for large ranges.

Functionally, this call is equivalent to calling OS_SynchroniseCodeAreas with bit 1 of R0 set.

See also

• OS_MMUControl 2
• OS_SynchroniseCodeAreas