Showing changes from revision #2 to #3:
Added | Removed | Changed
Entry | |
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R0 | 32 + flags (reserved) |
Exit | |
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R0 | Base address of processor vectors |
R1 | Size of processor vectors |
The purpose of this call is to return information about where the processor vectors are located, and the amount of space available for FIQ handler code.
The size returned in R1 is the total amount of space reserved for the processor vectors, in bytes. FIQ handlers are able to use the area from R0+&1C to R0+R1 for storing their code/data.
Currently 256 bytes are set aside for the processor vectors, to match older versions of RISC OS. However in the future more space may be made available.
Care must be taken when calling this reason code; see the main OS_PlatformFeatures page.