RISCOS_MapInIO64 (changes)
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Hardware Abstraction Layer
» RISC OS entry points from HAL
» RISCOS_MapInIO64
RISCOS_MapInIO64
(OS entry #7)
void *RISCOS_MapInIO64(unsigned int flags, uint64_t phys, unsigned int size)
| Entry | |
|---|---|
| flags | Bits 0-19: B, C, TEX, AP and (for VMSAv6) APX flags for L1 page table section map entry |
| Bit 20: Doubly map region | |
| Bit 21: AP flags specified (otherwise, default to SVC RW access, User none) | |
| Other bits reserved | |
| phys | Physical address to map in |
| size | Number of bytes of memory to map in |
| Exit | |
|---|---|
| - | Virtual address corresponding to phys |
| 0 for failure |
Use
As for RISCOS_MapInIO, but accepting a 64-bit physical address argument.
See also
Information sources: Kernel.Docs.HAL.HAL_API, Kernel.hdr.OSEntries in CVS
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