TLB_InvalidateEntry ARMop (changes)
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» OS
» OS_MMUControl
» OS_MMUControl 2
» TLB_InvalidateEntry ARMop
TLB_InvalidateEntry ARMop
| Entry | |
|---|---|
| R0 | Logical address of entry to invalidate (page aligned) |
| Exit | |
|---|---|
| R0 | Corrupt |
Use
The TLB or TLBs are to be invalidated for the entry at the given logical address.
Notes
The address must be page aligned (4k).
See also
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