iic_transfer (changes)

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Hardware Abstraction Layer

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» HAL IIC API

» iic_transfer structure

  "C" style construct typedef struct iic_transfer {   unsigned addr:8;   unsigned :21;   unsigned riscos_retry:1;   unsigned checksumonly:1;   unsigned nostart:1;   union   {   unsigned checksum;       void *data;   } d;   unsigned len; } iic_transfer;  Assembler method   R0 points to the data block which is a list of transfers set out as:-     Word 0           bit 0    = Write/Read           bit 1-7  = Address of device           bit 8-28 = Reserved           bit 29   = Retry flag           bit 30   = Return checksum only flag           bit 31   = Send no start flag     Word 1 = Pointer to memory for data to be sent/received              OR checksum value if bit 30 of word 0 set     Word 2 = Length of data to send/receive    This is repeated for the number of transfers required (R1)

Use

This structure is used to describe a transfer as performed by the high-level HAL IIC API. It is also used by RISCOS_IICOpV and the OS_IICOp SWI.

• A full IIC transfer (from START bit to STOP bit) is described by one or more iic_transfer structures, arranged in a list
• Each subtransfer is described by a single iic_transfer
• The direction of the subtransfer is determined by the least significant bit of addr, as per the IIC spec (1=Read, 0=Write).
• If nostart is 0, a START is first transmitted followed by addr , . otherwise the data flow continues where the previous subtransfer left off.nostart must be 0 for the first subtransfer.
• If nostart is 1, the transfer must be a continuation of the previous block, without any start, stop or address bits being sent, and without a change in the read/write bit.
• For writes, len bytes of data are read from data and transmitted across the bus.
• For reads, len bytes of data are read from the bus and:
  • Written to data if checksumonly = 0
  • Summed to checksum if checksumonly = 1, to produce a 32bit checksum
• The riscos_retry bit is of no concern to HAL IIC drivers. Retries are the sole responsibility of RISC OS; if riscos_retry is set for the first transfer of a list sent via RISCOS_IICOpV/OS_IICOp, then RISC OS will retry the transfer list if it fails due to bus-busy or no-ack errors.
• Other bits are reserved and should be zero.
• A stop bit must be sent after the last iic_transfer block has been transferred. Unless restricted by the IIC controller hardware design, stop bits must not be sent during the middle of the iic_transfer list.

See also

• HAL_IICTransfer
• RISCOS_IICOpV
• OS_IICOp

Information source: Kernel.Docs.HAL.MoreEnts in CVS