Alignment
---------
The lack of __aligned on TRB and ERSTE merits a careful look. 

There's only one use of ERSTE, and this is allocated from an array in sc_eventst_dma. The sc_eventst_dma 
comes from a usb_allocmem() which (via the macro in usb_port.h) comes from malloc_contig(), which in turn
uses SWI PCI_RAMAlloc. Since the structure is itself a multiple of 16, the array of ERSTE is also
handily aligned too - it's safe to remove the __aligned attribute.

There are many uses of the TRB. The controller requires 16 byte alignment for these to work. However, 
almost all of them don't care about the alignment as the struct is passed by reference to other functions
which end up at xhci_trb_put where the values are split up into function arguments anyway. The key is 
whether the first argument (struct xhci_trb *const) is good or not.
xr_trb is just a pointer to keep track, no storage, assigned from xhci_ring_trbv(). This comes from the
xr_dma region, which again uses usb_allocmem() so is fine.
The xx_trb[20] array comes via poolcache_get() which is backed by SWI PCI_RAMAlloc, and is used to
build transfers prior to calling xhci_ring_put() which in turn uses xhci_trb_put() so again there's
no worries about that being aligned. Arguably the pool cache doesn't need to be DMA capable.
