Interrupts
==========

There are several conditions that must exist before the IDE driver receives
an interrupt:

   a. the controller must assert IRQ14;
   b. IEN must be enabled in the controller digital output register;
   c. the interrupt must be enabled in IOC (or on the podule);
   d. the CPU must have IRQs enabled.

Condition (b) is always true except during the handling of an interrupt from
the controller. In order to maintain a low interrupt latency, the driver
enables CPU IRQs (d) in its interrupt handler. If the interrupt were not
masked during this time, the controller could interrupt the interrupt
handler which is not designed to be reentrant. (As an example, consider a
multi-sector read: after the interrupt for the first sector, the driver
reads the sector data and the controller interrupts again immediately
because it has cached the next sector.) Option (b) has been chosen instead
of (c) because it requires fewer instructions. Interrupts *are* disabled in
IOC (or on the podule) when no IDE command is active.

